AD1892

REV. 0

–7–

Power Supply Connections

Pin Name SOIC

I/O

Description

22

Digital Supply. +5 V nominal supply voltage.

DGND

7

Digital Ground. +0 V nominal supply connection.

Miscellaneous

Pin Name SOIC

I/O

Description

MCLK

28

I

Master clock. Must be 512

× F

PD/RST

1

I

Active LO power-down/reset, which clears all on-chip registers on the AD1892 to their default state

and stops the on-chip clocks. Bring HI for normal chip operation.

MUTE

27

I

Mute input. HI hardware mutes the serial digital audio output to zeros (midscale). All control

functions on the AD1892 (Channel Status, Q-Channel subcode, etc.) continue to function while the

AD1892 is muted. Should be LO for normal operation.

PIN CONFIGURATION

14

13

12

11

17

16

15

20

19

18

10

9

8

1

2

3

4

7

6

5

TOP VIEW

(Not to Scale)

28

27

26

25

24

23

22

21

PD/RST

L

RCLK

BCLK

MUTE

MCLK

CCLK

CS

SDI

SYNC

SDATA

SDO

QDFS

DGND

SFCLK

U/CBIT

INT

CC

CB

CA

ERROR

NOSIG

RXP

RXN

CD

CON/

PRO

CSCLK

CE

AD1892