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MAX6651EEE Datasheet(PDF) 19 Page - Maxim Integrated Products |
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MAX6651EEE Datasheet(HTML) 19 Page - Maxim Integrated Products |
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19 / 25 page ![]() Fan-Speed Regulators and Monitors with SMBus/I2C-Compatible Interface Maxim Integrated 19 MAX6650/MAX6651 For parallel fan control while monitoring only a single fan, select the MAX6650. Synchronized Fan Control (MAX6651 Only) In systems with multiple fans, an audible beat frequency can sometimes be detected due to fan speed mismatch. This happens in systems where fans are connected in parallel or in systems with a MAX6650 controlling each fan. In parallel fan systems, speed mismatches occur because no two fans are identical. Slight mechanical variations or loading differences can result in enough of a speed mismatch to cause an audible beat. Even in systems where there is a MAX6650/MAX6651 for each fan, there can still be speed mismatches. This is primarily due to the oscillator tolerance. The MAX6650/MAX6651 oscillator tolerance is specified to be ±10%. In the worst case, this could result in a 20% (one 10% high, one 10% low) speed mismatch. The solution is to use a single MAX6651 for each fan, and configure the parts to use a shared clock. The shared clock can either be an external system clock or one of the MAX6651’s internal clocks. If an external clock is used, its frequency can range from approxi- mately 50kHz to 500kHz. For synchronized fan control, select the MAX6651. Combination In more complex systems, a combination of some or all of the above control types may be needed. Choosing a Fan Once the topology is chosen, the next step is to choose a fan. See the appropriate section. Enter a zero in bit 3 of the configuration register for a 5V fan and 1 for a 12V fan. Configuring this bit also adjusts the tachometer input threshold voltage. This optimizes operation of the MAX6650/MAX6651 for the operating voltage of the fan being used. Setting the Mode of Operation The MAX6650/MAX6651 have four modes of operation as determined by bits 5 and 6 of the configuration reg- ister: full on, full off, open loop, and closed loop. Full-On The full-on mode applies the maximum available volt- age across the fan, guaranteeing maximum cooling. Full-on mode can be entered through software or hard- MAX6651 VCC SCL 10k Ω SDA GPIO0 OUT ADD GND FB TACH0 VCC 3V TO 5.5V VFAN 5V OR 12V CCOMP 10 μF SMBus/I2C INTERFACE GPIO1 GPIO2 FULL ON ALERT FAN 2.2k Ω VID HOT-SWAP SECTION Figure 13. Hot-Swap Application |
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