PCAL6408APW datasheet(12/48 Pages) NXP

12 / 48 page

PCAL6408A

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Product data sheet

Rev. 2 — 6 December 2012

12 of 48

NXP Semiconductors

PCAL6408A

Low-voltage translating, 8-bit I2C-bus/SMBus I/O expander

7.4.10 Interrupt status register (46h)

This read-only register is used to identify the source of an interrupt. When read, a logic 1

indicates that the corresponding input pin was the source of the interrupt. A logic 0

indicates that the input pin is not the source of an interrupt.

When a corresponding bit in the interrupt mask register is set to 1 (masked), the interrupt

status bit will return logic 0.

7.4.11 Output port configuration register (47h)

The output port configuration register selects port-wise push-pull or open-drain I/O stage.

A logic 0 configures the I/O as push-pull (Q1 and Q2 are active, see Figure 7). A logic 1

configures the I/O as open-drain (Q1 is disabled, Q2 is active) and the recommended

command sequence is to program this register (47h) before the Configuration register

(03h) sets the port pins as outputs.

Table 17.

Interrupt status register (address 46h)

Bit

Symbol

Default

Table 18.

Output port configuration register (address 47h)

Bit

Symbol

reserved

ODEN

Default

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