AD7723 datasheet(22/23 Pages) AD

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AD7723

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REV. 0

GROUNDING AND LAYOUT

The analog and digital power supplies to the AD7723 are inde-

pendent and separately pinned out to minimize coupling be-

tween analog and digital sections within the device. All the

AD7723 AGND and DGND pins should be soldered directly to

a ground plane to minimize series inductance. In addition, the

ac path from any supply pin or reference pin (REF1 and REF2)

through its decoupling capacitors to its associated ground must be

made as short as possible (Figure 44). To achieve the best decou-

pling, place surface mount capacitors as close as possible to the

device, ideally right up against the device pins.

All ground planes must not overlap to avoid capacitive coupling.

The AD7723’s digital and analog ground planes must be con-

nected at one place by a low inductance path, preferably right

under the device. Typically, this connection will either be a

trace on the Printed Circuit Board of 0.5 cm wide when the

ground planes are on the same layer, or 0.5 cm wide minimum

plated through holes when the ground planes are on different

layers. Any external logic connected to the AD7723 should use

a ground plane separate from the AD7723’s digital ground

plane. These two digital ground planes should also be con-

nected at just one place.

Separate power supplies for AVDD and DVDD are also highly

desirable. The digital supply pin DVDD should be powered from

a separate analog supply, but if necessary DVDD may share its

power connection to AVDD. Refer to the connection diagram

(Figure 44). The ferrites are also recommended to filter high

frequency signals from corrupting the analog power supply.

A minimum etch technique is generally best for ground planes

as it gives the best shielding. Noise can be minimized by paying

attention to the system layout and preventing different signals

from interfering with each other. High level analog signals

should be separated from low level analog signals, and both

should be kept away from digital signals. In waveform sampling

and reconstruction systems the sampling clock (CLKIN) is as

vulnerable to noise as any analog signal. CLKIN should be

isolated from the analog and digital systems. Fast switching

signals like clocks should be shielded with their associated

ground to avoid radiating noise to other sections of the board,

and clock signals should never be routed near the analog inputs.

Avoid running digital lines under the device as these will couple

noise onto the die. The analog ground plane should be allowed

to run under the AD7723 to shield it from noise coupling. The

power supply lines to the AD7723 should use as large a trace as

possible (preferably a plane) to provide a low impedance path

and reduce the effects of glitches on the power supply line.

Avoid crossover of digital and analog signals. Traces on opposite

sides of the board should run at right angles to each other. This

will reduce the effects of feedthrough through the board.

+5V

10 F

100nF

10nF

10 F

220nF

10nF

1 F

REF2

AGND2

REF1

AVDD1

AGND1

AGND

AVDD

DVDD

DGND

AD7723 ANALOG

GROUND PLANE

AD7723 DIGITAL

GROUND PLANE

Figure 44. Reference and Power Supply Decoupling

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