AD7750 datasheet(2/16 Pages) AD

2 / 16 page

–2–

REV. 0

AD7750–SPECIFICATIONS

(VDD = 5 V

5%, AGND = 0 V, DGND = 0 V, REFIN = +2.5 V, CLKIN = 3.58 MHz

TMIN to TMAX = –40 C to +85 C, ACDC = Logic High)

A Version

–40 C to

Parameter

+85 C

Units

Test Conditions/Comments

ACCURACY

Measurement Error

Channel 2 with Full-Scale Signal

Gain = 1

0.2

% Reading max

Measured Over a Dynamic Range on Channel 1 of 500:1

0.3

% Reading max

Measured Over a Dynamic Range on Channel 1 of 1000:1

Gain = 16

0.2

% Reading max

Measured Over a Dynamic Range on Channel 1 of 500:1

0.4

% Reading max

Measured Over a Dynamic Range on Channel 1 of 1000:1

Phase Error Between Channels

CLKIN = 3.58 MHz, Line Frequency = 50 Hz

Phase Lead 40

° (PF = +0.8)

±0.2

Degrees (

°) max

HPF Filter On, ACDC = 1

Phase Lag 60

° (PF = –0.5)

±0.2

Degrees (

°) max

HPF Filter On, ACDC = 1

Feedthrough Between Channels

HPF Filter On, ACDC = 1, Mode 3, Channel 1 = 0 V

Output Frequency Variation (FOUT)

0.0005

% Full-Scale max

Channel 2 = 500 mV rms at 50 Hz

Power Supply Rejection

HPF Filter On, ACDC = 1, Mode 3, Channel 1 = 0 V

Output Frequency Variation (FOUT)

0.03

% Full-Scale max

Channel 2 = 500 mV rms, Power Supply Ripple

250 mV at 50 Hz. See Figures 1 and 3.

ANALOG INPUTS

Maximum Signal Levels

±1

V max

On Any Input, V1+, V1–, V2+ and V2–. See Analog Inputs.

Input Impedance (DC)

400

Ω min

CLKIN = 3.58 MHz

Bandwidth

3.5

kHz typ

CLKIN = 3.58 MHz, CLKIN/1024

Offset Error

±10

mV typ

Gain Error

±4

% Full-Scale typ

Gain Error Match

±0.3

% Full-Scale typ

REFERENCE INPUT

REFIN Input Voltage Range

2.7

V max

2.5 V + 8%

2.3

V min

2.5 V – 8%

Input Impedance

Ω min

ON-CHIP REFERENCE

Nominal 2.5 V

Reference Error

±200

mV max

Temperature Coefficient

ppm/

°C typ

CLKIN

Input Clock Frequency

4.5

MHz max

MHz min

LOGIC INPUTS

FS, S1, S2, ACDC and G1

Input High Voltage, VINH

2.4

V min

VDD = 5 V ± 5%

Input Low Voltage, VINL

0.8

V max

VDD = 5 V ± 5%

Input Current, IIN

±10

µA max

Typically 10 nA, VIN = 0 V to VDD

Input Capacitance, CIN

pF max

CLKIN

Input High Voltage, VINH

V min

Input Low Voltage, VINL

0.4

V max

LOGIC OUTPUTS

F1 and F2

Output High Voltage, VOH

ISOURCE = 8 mA

4.3

V min

VDD = 5 V

Output Low Voltage, VOL

ISINK = 8 mA

0.5

V max

VDD = 5 V

FOUT and REVP

Output High Voltage, VOH

ISOURCE = 1 mA

V min

VDD = 5 V ± 5%

Output Low Voltage, VOL

ISINK = 200 µA

0.4

V max

VDD = 5 V ± 5%

High Impedance Leakage Current

±10

µA max

High Impedance Capacitance

pF max

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