ADM1031 datasheet(18/32 Pages) AD

18 / 32 page

REV. 0

ADM1031

–18–

Effect of ADC Sample Rate on Filtered Mode

The second means by which to change the Filtered Mode charac-

teristics is to adjust the ADC sample rate. The faster the ADC

sample rate, the more temperature samples are obtained per sec-

ond. One way to apply filtering to the control loop is to slow down

the ADC sampling rate. This means that the number of iterations

of the Filtered Mode algorithm per second is effectively reduced.

If the number of temperature measurements per second is

reduced, how often the PWM_OUT signal controlling the fan is

updated is also reduced.

Bits <4:2> of the Fan Filter Register (Reg 0x23) set the ADC

sample rate. The default ADC sample rate is 1.4 kHz. The ADC

sample rate is selectable from 87.5 Hz to 11.2 kHz. Table IX

shows how many temperature samples are obtained per second,

for each of the ADC sample rates.

Table IX. Temperature Updates per Second

ADC Sample Rate

Temperature Updates/Sec

87.5 Hz

0.0625

175 Hz

0.125

350 Hz

0.25

700 Hz

0.5

1.4 kHz

1 (Default)

2.8 kHz

5.6 kHz

11.2 kHz

RELEVANT REGISTERS FOR FILTERED AUTOMATIC

FAN SPEED CONTROL MODE

In addition to the registers used to program the normal Auto-

matic Fan Speed Control Mode, the following register needs to

be programmed.

<7>

Spin-up Disable :- when this bit is set to 1, fan spin-up

is disabled. (Default = 0)

<6:5> Ramp Rate: these bits set the ramp rate for filtered mode.

00 = 1 (0.416% Duty Cycle Change)

01 = 2 (0.833% Duty Cycle Change)

10 = 4 (1.66% Duty Cycle Change)

11 = 8 (3.33% Duty Cycle Change)

<4:2> ADC Sample Rate

000 = 87.5 Hz

001 = 175 Hz

010 = 350 Hz

011 = 700 Hz

100 = 1.4 kHz (Default)

101 = 2.8 kHz

110 = 5.6 kHz

111 = 11.2 kHz

<1>

Fan 2 Filter Enable: when this bit is set to 1, it enables

filtering on Fan 2. Default = 0.

<0>

Fan 1 Filter Enable: when this bit is set to 1, it enables

filtering on Fan 1. Default = 0.

PROGRAMMING THE FILTERED AUTOMATIC FAN

SPEED CONTROL LOOP

1. Program a value for TMIN.

2. Program a value for the slope TRANGE.

3. TMAX = TMIN + TRANGE.

4. Program a value for Fan Spin-up Time.

5. Program the desired Automatic Fan Speed Control Mode

Behavior, i.e., which temperature channel controls the fan.

6. Program a ramp rate for the filtered mode.

7. Program the ADC sample rate in the Fan Filter Register.

8. Set Bit 0 to enable fan filtered mode for Fan 1.

9. Set Bit 1 to enable the fan filtered mode for Fan 2.

10. Select Automatic Fan Speed Control Mode by setting Bit 7

of Configuration Register 1.

PWM DUTY CYCLE SELECT MODE

The ADM1031 may be operated under software control by

clearing Bit 7 of Configuration Register 1 (Register 0x00). This

allows the user to directly control PWM duty cycle for each fan.

Clearing Bits 5, 6 of Configuration Register 1 allows fan control

by varying PWM duty cycle. Values of duty cycle between 0% to

100% may be written to the Fan Speed Config Register (0x22)

to control the speed of each fan. Table X shows the relationship

between hex values written to the Fan Speed Configuration

Table X. PWM Duty Cycle Select Mode

Hex Value

PWM Duty Cycle

14%

20%

27%

33%

40%

47%

53%

60%

67%

73%

80%

87%

93%

100%

Bits <3:0> set the PWM duty cycle for Fan 1; Bits <7:4> set the PWM duty

cycle for Fan 2.

ADM1031 Datasheet(PDF) 18 Page - Analog Devices

ADM1031 Datasheet(HTML) 18 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Datasheet Download

Link URL