3

SAMA5D3 Series [SUMMARY DATASHEET]

11121AS–ATARM–31-Jan-13

One Four-channel 16-bit PWM Controller

One 12-channel 12-bit Analog-to-Digital Converter with Resistive Touch-Screen function

Write Protected Registers

Security

TRNG: True Random Number Generator

Encryption Engine

AES: 256-bit, 192-bit, 128-bit Key Algorithm, Compliant with FIPS PUB 197 Specifications

TDES: Two-key or Three-key Algorithms, Compliant with FIPS PUB 46-3 Specifications

SHA: Supports Secure Hash Algorithm (SHA1, SHA224, SHA256, SHA384, SHA512)

I/O

Five 32-bit Parallel Input/Output Controllers

160 I/Os

Input Change Interrupt Capability on Each I/O Line, Selectable Schmitt Trigger Input

Individually Programmable Open-drain, Pull-up and Pull-down Resistor, Synchronous Output, Filtering

Slew Rate Control on High Speed I/Os

Impedance Control on DDR I/Os

Package

324-ball LFBGA, pitch 0.8 mm

Table 1-1.

SAMA5D3 Devices

SAMA5D31

SAMA5D33

SAMA5D34

SAMA5D35

LCDC

XXX

GMAC

XXX

EMAC

X

X

CAN0, CAN1

X

X

HSMCI2

X

X

X

UART0

X

X

UART1

X

X

TC1

X