ADSP-2173 datasheet(35/52 Pages) AD

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ADSP-2171/ADSP-2172/ADSP-2173

REV. A

–35–

ADSP-2173

Parameter

Min

Max

Unit

Bus Request/Grant

Timing Requirement:

tBH

Hold after CLKOUT High

0.25tCK + 2

tBS

Setup before CLKOUT Low

0.25tCK + 22

Switching Characteristic:

tSD

CLKOUT High to DMS, PMS, BMS,

0.25tCK + 16

, WR Disable

tSDB

DMS

, PMS, BMS, RD, WR

Disable to BG Low

tSE

High to DMS, PMS, BMS,

, WR Enable

tSEC

DMS

, PMS, BMS, RD, WR

Enable to CLKOUT High

0.25tCK – 10

tSDBH

DMS

, PMS, BMS, RD, WR

Disable to BGH Low

0ns

tSEH

BGH

High to DMS, PMS, BMS,

, WR Enable

0ns

NOTES

1BR is an asynchronous signal. If BR meets the setup/hold requirements, it will be recognized during the current clock cycle; otherwise the signal will be recognized

on the following cycle. Refer to the ADSP-2100 Family User’s Manual for BR/BG cycle relationships.

2BGH is asserted when the bus is granted and the processor requires control of the bus to continue.

CLKOUT

PMS, DMS

BMS, RD

CLKOUT

SDB

SEC

tSDBH

BGH

tSEH

Figure 26. Bus Request–Bus Grant

ADSP-2173 Datasheet(PDF) 35 Page - Analog Devices

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