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OR3LP26B Datasheet(PDF) 169 Page - Agere Systems |
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OR3LP26B Datasheet(HTML) 169 Page - Agere Systems |
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169 / 184 page ![]() Lucent Technologies Inc. 169 Data Sheet ORCA OR3LP26B FPSC March 2000 Embedded Master/Target PCI Interface Lucent Technologies Inc. Pin Information (continued) Table 70. Pinout Information (continued) * These pads are connected to a power plane in the package rather than to a particular pin. The entry's location in the table indicates the posi- tion of the power pad relative to nearby signal pads. † Pins marked No Connect must be left unconnected. ‡ These pins are connected to a power plane in the package rather than to a particular pad. OR3LP26B Pad Function PBGA 352 PBGAM 680 PT6D I/O B8 E11 PT6C I/O — A10 PT6B I/O — B10 PT6A I/O-TDI A8 C10 VSS VSS VSS*VSS* PT5D I/O C9 D10 PT5C I/O B7 E10 PT5B I/O D8 A9 PT5A — — — VDD2VDD2A7 VDD2 PT4D I/O C8 B9 PT4C I/O B6 C9 PT4B I/O D7 D9 PT4A I/O-TMS A6 E9 VSS VSS VSS*VSS* PT3D I/O C7 A8 PT3C I/O — B8 PT3B I/O — D8 PT3A I/O B5 E8 PT2D I/O A5 A7 PT2C I/O C6 B7 PT2B I/O B4 D7 PT2A I/O D5 E7 VDD VDD VDD*VDD* PT1D I/O A4 A6 PT1C I/O C5 C6 PT1B I/O B3 D6 PT1A I/O-TCK C4 B5 VSS VSS VSS*VSS* PRD_DATA RD_DATA/TDO A3 A4 VDD VDD VDD* VDD* VDD2VDD2— VDD2 ‡VDD —— ‡VDD —A3 ‡VDD —A32 ‡VDD —— ‡VDD —B3 ‡VDD —B4 |
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