OR3LP26B datasheet(168/184 Pages) AGERE

168 / 184 page

ORCA OR3LP26B FPSC

Data Sheet

Embedded Master/Target PCI Interface

March 2000

168

Lucent Technologies Inc.

Pin Information (continued)

Table 70. Pinout Information (continued)

* These pads are connected to a power plane in the package rather than to a particular pin. The entry's location in the table indicates the posi-

tion of the power pad relative to nearby signal pads.

† Pins marked No Connect must be left unconnected.

‡ These pins are connected to a power plane in the package rather than to a particular pad.

OR3LP26B Pad

Function

PBGA 352

PBGAM 680

PT14D

I/O

B13

A17

PT14C

I/O

D13

B17

PT14B

—

VDD2VDD2A13

VDD2

PT14A

I/O-D2

C14

C17

VSS

VSS*VSS*

PT13D

I/O-D1

B12

D17

PT13C

I/O

—

E17

PT13B

I/O

—

A16

PT13A

I/O

C13

B16

PT12D

I/O

A12

D16

PT12C

I/O

—

E16

PT12B

I/O

—

A15

PT12A

I/O-D0-DIN

B11

B15

VDD

VDD*VDD*

PT11D

I/O

C12

D15

PT11C

I/O

—

E15

PT11B

I/O

—

A14

PT11A

I/O

A11

B14

PT10D

I/O

D12

C14

PT10C

I/O

—

D14

PT10B

I/O

—

E14

PT10A

I/O-DOUT

B10

A13

VDD

VDD*VDD*

PT9D

I/O

C11

—

VDD2VDD2—

VDD2

PT9C

I/O

—

B13

PT9B

I/O

—

C13

PT9A

I/O

A10

D13

PT8D

I/O

D10

E13

PT8C

I/O

—

A12

PT8B

I/O

—

B12

PT8A

I/O

D12

VSS

VSS*VSS*

PT7D

I/O

C10

E12

PT7C

I/O

—

A11

PT7B

I/O

—

B11

PT7A

I/O

D11

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