OR3LP26B datasheet(166/184 Pages) AGERE

166 / 184 page

ORCA OR3LP26B FPSC

Data Sheet

Embedded Master/Target PCI Interface

March 2000

166

Lucent Technologies Inc.

Pin Information (continued)

Table 70. Pinout Information (continued)

* These pads are connected to a power plane in the package rather than to a particular pin. The entry's location in the table indicates the posi-

tion of the power pad relative to nearby signal pads.

† Pins marked No Connect must be left unconnected.

‡ These pins are connected to a power plane in the package rather than to a particular pad.

OR3LP26B Pad

Function

PBGA 352

PBGAM 680

PR1C

I/O

C25

F31

PR1D

I/O

D24

E33

VSS

VSS*VSS*

PRD_CFGN

RD_CFGN

C26

D34

VDD

VDD*VDD*

VSS

VSS*VSS*

VDD

VDD*VDD*

VSS

VSS*VSS*

PT28D

I/O-SECKUR

A25

A31

PT28C

I/O

B24

A30

PT28B

I/O

A24

C29

PT28A

I/O

B23

B29

VDD

VDD*VDD*

PT27D

I/O

C23

A29

PT27C

I/O

—

E28

PT27B

I/O

—

D28

PT27A

I/O-RDY/RCLK

A23

B28

PT26D

I/O

B22

A28

PT26C

I/O

D22

E27

PT26B

I/O

—

D27

PT26A

I/O

C22

B27

VSS

VSS*VSS*

PT25D

I/O

A22

A27

PT25C

I/O

B21

E26

PT25B

I/O

D20

D26

PT25A

I/O

C21

C26

PT24D

I/O-D7

A21

B26

PT24C

I/O

B20

A26

PT24B

I/O

A20

E25

PT24A

I/O

C20

D25

VSS

VSS*VSS*

PT23D

—

VDD2VDD2B19

VDD2

PT23C

I/O

D18

C25

PT23B

I/O

A19

B25

PT23A

I/O

—

A25

PT22D

I/O

C19

E24

PT22C

I/O

—

D24

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