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OR3LP26B Datasheet(PDF) 167 Page - Agere Systems |
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OR3LP26B Datasheet(HTML) 167 Page - Agere Systems |
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167 / 184 page ![]() Lucent Technologies Inc. 167 Data Sheet ORCA OR3LP26B FPSC March 2000 Embedded Master/Target PCI Interface Lucent Technologies Inc. Pin Information (continued) Table 70. Pinout Information (continued) * These pads are connected to a power plane in the package rather than to a particular pin. The entry's location in the table indicates the posi- tion of the power pad relative to nearby signal pads. † Pins marked No Connect must be left unconnected. ‡ These pins are connected to a power plane in the package rather than to a particular pad. OR3LP26B Pad Function PBGA 352 PBGAM 680 PT22B I/O — B24 PT22A I/O — A24 VSS VSS VSS*VSS* PT21D I/O B18 E23 PT21C I/O — D23 PT21B I/O — B23 PT21A I/O A18 A23 PT20D I/O-D6 B17 E22 PT20C I/O — D22 PT20B I/O — C22 PT20A I/O C18 B22 VDD VDD VDD*VDD* PT19D I/O A17 A22 PT19C I/O — E21 PT19B I/O — D21 PT19A I/O D17 C21 PT18D I/O B16 — VDD2VDD2— VDD2 PT18C I/O — B21 PT18B I/O — A21 PT18A I/O-D5 C17 E20 VDD VDD VDD*VDD* PT17D I/O A16 D20 PT17C I/O — B20 PT17B I/O — A20 PT17A I/O B15 E19 PT16D I/O A15 D19 PT16C I/O — B19 PT16B I/O — A19 PT16A I/O-D4 C16 E18 VSS VSS VSS*VSS* PECKT I-ECKT B14 D18 PT15D — — — PT15C I/O D15 — VDD2VDD2— VDD2 PT15B I/O A14 C18 PT15A I/O-D3 C15 A18 VSS VSS VSS*VSS* |
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