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OR3LP26B Datasheet(PDF) 164 Page - Agere Systems

Part # OR3LP26B
Description  Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface
PDF  184 Pages
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Manufacturer  AGERE [Agere Systems]
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OR3LP26B Datasheet(HTML) 164 Page - Agere Systems

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ORCA OR3LP26B FPSC
Data Sheet
Embedded Master/Target PCI Interface
March 2000
164
Lucent Technologies Inc.
Lucent Technologies Inc.
Pin Information (continued)
Table 70. Pinout Information (continued)
* These pads are connected to a power plane in the package rather than to a particular pin. The entry's location in the table indicates the posi-
tion of the power pad relative to nearby signal pads.
† Pins marked No Connect must be left unconnected.
‡ These pins are connected to a power plane in the package rather than to a particular pad.
OR3LP26B Pad
Function
PBGA 352
PBGAM 680
PR16A
I/O
T24
W31
PR16B
I/O
—
W33
PR16C
I/O
—
W34
PR16D
I/O
P25
—
VDD2VDD2—
VDD2
VSS
VSS
VSS*VSS*
PR15A
I/O
R23
V30
PR15B
I/O
P26
V32
PR15C
I/O
R24
V33
PR15D
I/O
N25
V34
VDD
VDD
VDD*VDD*
PECKR
I-ECKR
N23
U34
PR14A
—
—
—
PR14B
I/O
N26
U33
PR14C
I/O
P24
U32
PR14D
I/O
M25
U31
VSS
VSS
VSS*VSS*
PR13A
—
—
—
VDD2VDD2N24
VDD2
PR13B
I/O
—
U30
PR13C
I/O
—
T34
PR13D
I/O
M26
T33
PR12A
I/O
L25
T31
PR12B
I/O
—
T30
PR12C
I/O
—
R34
PR12D
I/O
M24
R33
VSS
VSS
VSS*VSS*
PR11A
I/O-CS1
L26
R31
PR11B
I/O
—
R30
PR11C
I/O
—
P34
PR11D
I/O
M23
P33
PR10A
I/O
K25
P32
PR10B
I/O
—
P31
PR10C
I/O
—
P30
PR10D
I/O
L24
—
VDD2VDD2—
VDD2
VDD
VDD
VDD*VDD*
PR9A
I/O-CS0
K26
N34



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