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OR3LP26B Datasheet(PDF) 160 Page - Agere Systems

Part # OR3LP26B
Description  Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface
PDF  184 Pages
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Manufacturer  AGERE [Agere Systems]
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OR3LP26B Datasheet(HTML) 160 Page - Agere Systems

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ORCA OR3LP26B FPSC
Data Sheet
Embedded Master/Target PCI Interface
March 2000
160
Lucent Technologies Inc.
Lucent Technologies Inc.
Pin Information (continued)
Table 70. Pinout Information (continued)
* These pads are connected to a power plane in the package rather than to a particular pin. The entry's location in the table indicates the posi-
tion of the power pad relative to nearby signal pads.
† Pins marked No Connect must be left unconnected.
‡ These pins are connected to a power plane in the package rather than to a particular pad.
OR3LP26B Pad
Function
PBGA 352
PBGAM 680
PB10B
No Connect†
—AP13
PB10C
No Connect†
—AK14
PB10D
ad5
AC10
AL14
PB11A
ad4
AE11
AM14
PB11B
No Connect†
—AN14
PB11C
No Connect†
—AP14
PB11D
ad3
AD10
AK15
VDD
VDD
VDD*VDD*
PB12A
ad2
AF11
AL15
PB12B
No Connect†
—AN15
PB12C
No Connect†
—AP15
PB12D
ad1
AE12
AK16
PB13A
ad0
AF12
AL16
PB13B
No Connect†
—AN16
PB13C
No Connect†
—AP16
PB13D
framen
AD11
AK17
VSS
VSS
VSS*VSS*
PB14A
No Connect†
AE13
—
VDD2VDD2—
VDD2
PB14B
irdyn
AC12
AM17
PB14C
trdyn
AF13
AP17
PB14D
devseln
AD12
AP18
VSS
VSS
VSS*VSS*
PECKB
clk
AE14
AN18
PB15A
—
—
—
PB15B
stopn
AC14
AM18
PB15C
ack64n
AF14
AL18
PB15D
req64n
AD13
AK18
VSS
VSS
VSS*VSS*
PB16A
—
—
—
VDD2VDD2AE15
VDD2
PB16B
No Connect†
—AP19
PB16C
No Connect†
—AN19
PB16D
c_be7n
AD14
AL19
PB17A
c_be6n
AF15
AK19
PB17B
No Connect†
—AP20
PB17C
No Connect†
—AN20
PB17D
c_be5n
AE16
AL20



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