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OR3LP26B Datasheet(PDF) 159 Page - Agere Systems

Part # OR3LP26B
Description  Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface
PDF  184 Pages
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Manufacturer  AGERE [Agere Systems]
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OR3LP26B Datasheet(HTML) 159 Page - Agere Systems

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Lucent Technologies Inc.
159
Data Sheet
ORCA OR3LP26B FPSC
March 2000
Embedded Master/Target PCI Interface
Lucent Technologies Inc.
Pin Information (continued)
Table 70. Pinout Information (continued)
* These pads are connected to a power plane in the package rather than to a particular pin. The entry's location in the table indicates the posi-
tion of the power pad relative to nearby signal pads.
† Pins marked No Connect must be left unconnected.
‡ These pins are connected to a power plane in the package rather than to a particular pad.
OR3LP26B Pad
Function
PBGA 352
PBGAM 680
PB2B
No Connect†
—AK7
PB2C
No Connect†
—AL7
PB2D
—
—
—
VDD2VDD2AF4
VDD2
PB3A
ad18
AE5
AN7
PB3B
No Connect†
—AP7
PB3C
ad17
AC5
AK8
PB3D
ad16
AD5
AL8
VSS
VSS
VSS*VSS*
PB4A
c_be2n
AF5
AN8
PB4B
perrn
AE6
AP8
PB4C
serrn
AC7
AK9
PB4D
par
AD6
AL9
PB5A
c_be1n
AF6
AM9
PB5B
ad15
AE7
AN9
PB5C
ad14
AF7
AP9
PB5D
ad13
AD7
AK10
VSS
VSS
VSS*VSS*
PB6A
ad12
AE8
AL10
PB6B
No Connect†
—
AM10
PB6C
No Connect†
—AN10
PB6D
ad11
AC9
AP10
PB7A
ad10
AF8
AK11
PB7B
No Connect†
—AL11
PB7C
No Connect†
—AN11
PB7D
ad9
AD8
AP11
VSS
VSS
VSS*VSS*
PB8A
ad8
AE9
AK12
PB8B
No Connect†
—AL12
PB8C
No Connect†
—AN12
PB8D
c_be0n
AF9
AP12
PB9A
ad7
AE10
AK13
PB9B
No Connect†
—AL13
PB9C
No Connect†
—
AM13
PB9D
ad6
AD9
AN13
VDD
VDD
VDD*VDD*
VDD2VDD2—
VDD2
PB10A
No Connect†
AF10
—



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