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OR3LP26B Datasheet(PDF) 157 Page - Agere Systems

Part # OR3LP26B
Description  Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface
PDF  184 Pages
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Manufacturer  AGERE [Agere Systems]
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OR3LP26B Datasheet(HTML) 157 Page - Agere Systems

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Lucent Technologies Inc.
157
Data Sheet
ORCA OR3LP26B FPSC
March 2000
Embedded Master/Target PCI Interface
Lucent Technologies Inc.
Pin Information (continued)
Table 70. Pinout Information (continued)
* These pads are connected to a power plane in the package rather than to a particular pin. The entry's location in the table indicates the posi-
tion of the power pad relative to nearby signal pads.
† Pins marked No Connect must be left unconnected.
‡ These pins are connected to a power plane in the package rather than to a particular pad.
OR3LP26B Pad
Function
PBGA 352
PBGAM 680
PL15B
I/O
P1
V2
PL15A
I/O-MPI_RW
N3
V3
VSS
VSS
VSS*VSS*
PL16D
I/O-MPI_ACK
R2
V4
PL16C
I/O
—
V5
PL16B
I/O
—
W1
PL16A
I/O
P3
W2
PL17D
I/O
R1
W4
PL17C
I/O
—
W5
PL17B
I/O
—
Y1
PL17A
I/O-MPI_BI
T2
Y2
VSS
VSS
VSS*VSS*
PL18D
I/O
R3
Y4
PL18C
I/O
—
Y5
PL18B
I/O
—
AA1
PL18A
I/O-SECKLL
T1
AA2
PL19D
No Connect†
R4
AA3
PL19C
No Connect†
—AA4
PL19B
No Connect†
—AA5
PL19A
I/O-MPI_IRQ
U2
AB1
VDD
VDD
VDD*VDD*
PL20D
No Connect†
T3
AB2
PL20C
No Connect†
U1
AB3
PL20B
No Connect†
U4
—
VDD2VDD2—
VDD2
PL20A
No Connect†
V2
AB4
PL21D
VDD
U3
AB5
PL21C
VSS
V1
AC1
PL21B
VSS
W2
AC2
PL21A
intan
W1
AC4
VSS
VSS
VSS*VSS*
PL22D
rstn
V3
AC5
PL22C
gntn
Y2
AD1
PL22B
No Connect†
—AD2
PL22A
No Connect†
—AD4
PL23D
reqn
W4
AD5
PL23C
No Connect†
—AE1



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