OR3LP26B datasheet(155/184 Pages) AGERE

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Lucent Technologies Inc.

155

Data Sheet

ORCA OR3LP26B FPSC

March 2000

Embedded Master/Target PCI Interface

Lucent Technologies Inc.

Pin Information (continued)

Table 70. Pinout Information

* These pads are connected to a power plane in the package rather than to a particular pin. The entry's location in the table indicates the posi-

tion of the power pad relative to nearby signal pads.

† Pins marked No Connect must be left unconnected.

‡ These pins are connected to a power plane in the package rather than to a particular pad.

OR3LP26B Pad

Function

PBGA 352

PBGAM 680

VSS

VSS*VSS*

VDD

VDD*VDD*

VSS

VSS*VSS*

PL1D

I/O

PL1C

I/O

PL1B

I/O

PL1A

I/O

VDD

VDD*VDD*

PL2D

I/O-A0-MPI_BE0

PL2C

I/O

—

PL2B

I/O

—

PL2A

I/O

PL3D

I/O

PL3C

I/O

—

PL3B

I/O

PL3A

I/O

VSS

VSS*VSS*

PL4D

I/O

—

VDD2VDD2E1

VDD2

PL4C

I/O

PL4B

I/O

PL4A

I/O

—

PL5D

I/O

PL5C

I/O

—

PL5B

I/O

—

PL5A

I/O

—

VDD

VDD*VDD*

PL6D

I/O

PL6C

I/O

PL6B

I/O

PL6A

I/O

—

PL7D

I/O-A1-MPI_BE1

PL7C

I/O

—

PL7B

I/O

—

PL7A

I/O

—

VSS

VSS*VSS*

PL8D

I/O

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