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OR3LP26B Datasheet(PDF) 158 Page - Agere Systems

Part # OR3LP26B
Description  Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface
PDF  184 Pages
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Manufacturer  AGERE [Agere Systems]
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OR3LP26B Datasheet(HTML) 158 Page - Agere Systems

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ORCA OR3LP26B FPSC
Data Sheet
Embedded Master/Target PCI Interface
March 2000
158
Lucent Technologies Inc.
Lucent Technologies Inc.
Pin Information (continued)
Table 70. Pinout Information (continued)
* These pads are connected to a power plane in the package rather than to a particular pin. The entry's location in the table indicates the posi-
tion of the power pad relative to nearby signal pads.
† Pins marked No Connect must be left unconnected.
‡ These pins are connected to a power plane in the package rather than to a particular pad.
OR3LP26B Pad
Function
PBGA 352
PBGAM 680
PL23B
No Connect†
—AE2
PL23A
No Connect†
—AE3
VDD
VDD
VDD*VDD*
PL24D
ad31
Y1
AE4
PL24C
No Connect†
—AE5
PL24B
No Connect†
—AF1
PL24A
ad30
W3
AF2
PL25D
No Connect†
—AF3
PL25C
ad29
AA2
AF4
PL25B
ad28
Y4
AF5
PL25A
ad27
AA1
AG1
VSS
VSS
VSS*VSS*
PL26D
—
—
—
VDD2VDD2Y3
VDD2
PL26C
ad26
AB2
AG2
PL26B
No Connect†
—AG4
PL26A
ad25
AB1
AG5
PL27D
ad24
AA3
AH1
PL27C
c_be3n
AC2
AH2
PL27B
No Connect†
—AH4
PL27A
idsel
AB4
AH5
VDD
VDD
VDD*VDD*
PL28D
ad23
AC1
AJ3
PL28C
No Connect†
AB3
AJ4
PL28B
No Connect†
AD2
AK1
PL28A
vio
AC3
AK2
VSS
VSS
VSS*VSS*
PCCLK
CCLK
AD1
AL1
VDD
VDD
VDD*VDD*
VSS
VSS
VSS*VSS*
VDD
VDD
VDD*VDD*
VSS
VSS
VSS*VSS*
PB1A
ad22
AF2
AP4
PB1B
No Connect†
AE3
AN5
PB1C
ad21
AF3
AM6
PB1D
ad20
AE4
AN6
VDD
VDD
VDD*VDD*
PB2A
ad19
AD4
AP6



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