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FX3 Datasheet(PDF) 37 Page - Cypress Semiconductor |
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FX3 Datasheet(HTML) 37 Page - Cypress Semiconductor |
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37 / 45 page ![]() CYUSB301X Document Number: 001-52136 Rev. *N Page 37 of 45 Table 15. SPI Timing Parameters[11] Parameter Description Min Max Units fop Operating frequency 0 33 MHz tsck Cycle time 30 – ns twsck Clock high/low time 13.5 – ns tlead SSN-SCK lead time 1/2 tsck[12 ]-5 1.5 tsck[12]+ 5 ns tlag Enable lag time 0.5 1.5 tsck[12]+5 ns trf Rise/fall time – 8 ns tsdd Output SSN to valid data delay time – 5 ns tdv Output data valid time – 5 ns tdi Output data invalid 0 – ns tssnh Minimum SSN high time 10 – ns tsdi Data setup time input 8 – ns thoi Data hold time input 0 – ns tdis Disable data output on SSN high 0 – ns Notes 11. All parameters guaranteed by design and validated through characterization. 12. Depends on LAG and LEAD setting in the SPI_CONFIG register. |
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