CYUSB301X

Document Number: 001-52136 Rev. *N

Page 4 of 45

Functional Overview

Cypress’s EZ-USB FX3 is the next-generation USB 3.0

peripheral controller, providing integrated and flexible features.

FX3 has a fully configurable, parallel, general programmable

interface called GPIF II, which can connect to any processor,

ASIC, or FPGA. GPIF II is an enhanced version of the GPIF in

FX2LP, Cypress’s flagship USB 2.0 product. It provides easy and

glueless

connectivity

to

popular

interfaces,

such

as

asynchronous SRAM, asynchronous and synchronous address

data multiplexed interfaces, and parallel ATA.

FX3 has integrated the USB 3.0 and USB 2.0 physical layers

(PHYs) along with a 32-bit ARM926EJ-S microprocessor for

powerful data processing and for building custom applications. It

implements an architecture that enables 375-MBps data transfer

from GPIF II to the USB interface.

An integrated USB 2.0 OTG controller enables applications in

which FX3 may serve dual roles; for example, EZ-USB FX3 may

function as an OTG Host to MSC as well as HID-class devices.

FX3 contains 512 KB or 256 KB of on-chip SRAM (see Ordering

Information on page 41) for code and data. EZ-USB FX3 also

provides interfaces to connect to serial peripherals such as

FX3 comes with application development tools. The software

development

kit

comes

with

application

examples

for

accelerating time to market.

FX3 complies with the USB 3.0 v1.0 specification and is also

backward compatible with USB 2.0. It also complies with the

Battery

Charging

Specification

v1.1

and

USB 2.0

OTG

Specification v2.0.

Application Examples

In a typical application (see Figure 1), FX3 functions as a copro-

cessor and connects to an external processor, which manages

system-level functions. Figure 2 shows a typical application

diagram when FX3 functions as the main processor.

Figure 1. EZ-USB FX3 as a Coprocessor

EZ- USB FX3

(ARM9 Core)

External Serial Peripheral

(Example:: EEPROM)

Crystal *

Power

Subsystem

GPIF II

text

External Processor

(Example: MCU/CPU/

ASIC/FPGA)

Serial Interfaces

(example: I2C)

USB

Port

USB Host

*

A clock input may be provided on the

CLKIN pin instead of a crystal input

Note

1. Assuming that GPIF II is configured for a 32-bit data bus (available with certain part numbers; see Ordering Information on page 41), synchronous interface operating

at 100 MHz. This number also includes protocol overheads.