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MPC9600AE Datasheet(PDF) 4 Page - Integrated Device Technology

Part # MPC9600AE
Description  Low Voltage, 2.5V and 3.3V LVCMOS PLL Clock Driver
PDF  15 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

MPC9600AE Datasheet(HTML) 4 Page - Integrated Device Technology

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MPC9600 REVISION 6 JANUARY 7, 2013
4
©2013 Integrated Device Technology, Inc.
MPC9600 Data Sheet
LOW VOLTAGE, 2.5V AND 3.3V LVCMOS PLL CLOCK DRIVER
Table 2. Function Table (Controls)
Control Pin
0
1
REF_SEL
CCLK
PCLK
VCCA
PLL Bypass(1)
1. VCCA = GND, PLL off and bypassed for static test and diagnosis.
PLL Power
OE
Outputs Enabled
Outputs Disabled (except QFB)
FSELA
Output Bank A at VCO/2
Output Bank A at VCO/4
FSELB
Output Bank B at VCO/2
Output Bank B at VCO/4
FSELC
Output Bank C at VCO/2
Output Bank C at VCO/4
FSEL_FB
Feedback Output at VCO/8
Feedback Output at VCO/12
Table 3. Absolute Maximum Ratings(1)
1. Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is
not implied.
Symbol
Parameter
Min
Max
Unit
VCC
Supply Voltage
–0.3
4.6
V
VIN
DC Input Voltage
–0.3
VCC + 0.3
V
VOUT
DC Output Voltage
–0.3
VCC + 0.3
V
IIN
DC Input Current
20
mA
IOUT
DC Output Current
50
mA
TStor
Storage Temperature Range
–65
125
C
Table 4. General Specifications
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
VTT
Output Termination Voltage
VCC 2
V
MM
ESD Protection (Machine Model)
400
V
HBM
ESD Protection (Human Body Model)
4000
V
CDM
ESD Protection (Charged Device Model)
1500
V
LU
Latch-Up Immunity
200
mA
CPD
Power Dissipation Capacitance
10
pF
Per output
CIN
Input Capacitance
4.0
pF
Inputs



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