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ICS810001-21 Datasheet(PDF) 8 Page - Integrated Device Technology |
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ICS810001-21 Datasheet(HTML) 8 Page - Integrated Device Technology |
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8 / 19 page ![]() ICS810001DK-21 REVISION B APRIL 13, 2010 8 ©2010 Integrated Device Technology, Inc. ICS810001-21 Data Sheet FEMTOCLOCK™ DUAL VCXO VIDEO PLL Table 4B. LVCMOS/LVTTL DC Characteristics, VDD = VDDO = VDDX = 3.3V ± 5%, TA = 0°C to 70°C AC Electrical Characteristics Table 5. AC Characteristics, VDD = VDDO = VDDX = 3.3V ± 5%, TA = 0°C to 70°C NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium has been reached under these conditions. See Parameter Measurement Information Section. NOTE 1: Refer to the Phase Noise Plot. NOTE 2: Lock Time measured from power-up to stable output frequency. Symbol Parameter Test Conditions Minimum Typical Maximum Units VIH Input High Voltage 2.0 VDD + 0.3 V VIL Input Low Voltage -0.3 0.8 V IIH Input High Current CLK[0:1], CLK_SEL, P[1:0], V[3:0], N[1:0], MR, MF, XTAL_SEL VDD = VIN = 3.465V 150 µA OE, nBP0, nBP1 VDD = VIN = 3.465V 5 µA IIL Input Low Current CLK[0:1], CLK_SEL, P[1:0], V[3:0], N[1:0], MR, MF, XTAL_SEL VDD = 3.465V, VIN = 0V -5 µA OE, nBP0, nBP1 VDD = 3.465, VIN = 0V -150 µA VOH Output High Voltage IOH = -24mA 2.6 V VOL Output Low Voltage IOL = 24mA 0.5 V Symbol Parameter Test Conditions Minimum Typical Maximum Units fOUT Output Frequency nBP0, nBP1 = 00 14 35 MHz nBP1 = 1 31 175 MHz tjit(Ø) RMS Phase Jitter, (Random), NOTE 1 148.3516MHz, Integration Range: 12kHz – 20MHz 1.089 ps tR / tF Output Rise/Fall Time 20% to 80% 250 750 ps odc Output Duty Cycle 48 52 % tLOCK VCXO & FemtoClock PLL Lock Time; NOTE 2 M = 92, Bandwidth = 475Hz 100 ms M = 4004, Bandwidth = 6Hz 25 s |
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