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M68HC08 Datasheet(PDF) 155 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 155 Page - Freescale Semiconductor, Inc |
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155 / 332 page ![]() Timer Interface Module (TIM) MC68HC908JB16 — Rev. 1.1 Technical Data Freescale Semiconductor Timer Interface Module (TIM) 155 10.10.3 TIM Counter Modulo Registers The read/write TIM modulo registers contain the modulo value for the TIM counter. When the TIM counter reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM counter resumes counting from $0000 at the next timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and overflow interrupts until the low byte (TMODL) is written. Reset sets the TIM counter modulo registers. NOTE: Reset the TIM counter before writing to the TIM counter modulo registers. Address: T1CNTL, $000D and T2CNTL, $0043 Bit 7 654321 Bit 0 Read: Bit 7 654321 Bit 0 Write: Reset: 00000000 = Unimplemented Figure 10-6. TIM Counter Registers Low (TCNTL) Address: T1MODH, $000E and T2MODH, $0044 Bit 7 654321 Bit 0 Read: Bit 15 14 13 12 11 10 9 Bit 8 Write: Reset: 11111111 Figure 10-7. TIM Counter Modulo Register High (TMODH) Address: T1MODL, $000F and T2MODL, $0045 Bit 7 654321 Bit 0 Read: Bit 7 654321 Bit 0 Write: Reset: 11111111 Figure 10-8. TIM Counter Modulo Register Low (TMODL) |
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