M68HC08 datasheet(152/332 Pages) FREESCALE

152 / 332 page

Timer Interface Module (TIM)

Technical Data

MC68HC908JB16 — Rev. 1.1

152

Timer Interface Module (TIM)

Freescale Semiconductor

10.10 I/O Registers

NOTE:

References to either timer 1 or timer 2 may be made in the following text

by omitting the timer number. For example, TSC may generically refer to

both T1SC and T2SC.

These I/O registers control and monitor operation of the TIM:

•

TIM status and control register (TSC)

•

TIM counter registers (TCNTH:TCNTL)

•

TIM counter modulo registers (TMODH:TMODL)

•

TIM channel status and control registers (TSC0, TSC1)

•

TIM channel registers (TCH0H:TCH0L, TCH1H:TCH1L)

10.10.1 TIM Status and Control Register

The TIM status and control register (TSC):

•

Enables TIM overflow interrupts

•

Flags TIM overflows

•

Stops the TIM counter

•

Resets the TIM counter

•

Prescales the TIM counter clock

Address: T1SC, $000A and T2SC, $0040

Bit 7

654321

Bit 0

Read:

TOF

TOIE

TSTOP

PS2

PS1

PS0

Write:

TRST

Reset:

00100000

= Unimplemented

Figure 10-4. TIM Status and Control Register (TSC)

M68HC08 Datasheet(PDF) 152 Page - Freescale Semiconductor, Inc

M68HC08 Datasheet(HTML) 152 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL