IMX53IEC datasheet(171/173 Pages) FREESCALE

171 / 173 page

Revision History

i.MX53 Applications Processors for Industrial Products, Rev. 6

Freescale Semiconductor

171

Rev. 4

11/2011

• In Section 1, “Introduction,” added a new bullet item, Applications processor, to the bulleted list that

contains features of the i.MX53 processor.

•In Section 1.2, “Features,” changed “Target frequency” to “Maximum frequency” and added a new

bullet item to mention support for the DVFS feature.

•In Section 2.1, “Block Diagram,” added Figure 1, "i.MX53 System Block Diagram," on page 6.

•In Table 2, "i.MX53 Digital and Analog Blocks," on page 7, removed “Sorenson H.263 decode, 4CIF

resolution, 8 Mbps bit rate” from VPU brief description.

• Added a note after Section 4.2.1, “Power-Up Sequence,” cross-referencing i.MX53 System

Development User’s Guide.

•In Table 10, "GPIO I/O DC Electrical Characteristics," on page 27:

—Changed test condition “Iout = -1 mA” to “Iout = -0.8 mA” in the first row

—Removed test condition “Iout= specified Ioh Drive” from the first row

—Removed “0.8 x OVDD” from the Min column of the first row

—Changed test condition “Iout = 1 mA” to “Iout = 0.8 mA” in the second row

—Removed test condition “Iout= specified Iol Drive” from the second row

—Removed “0.2 x OVDD” from the Max column of the second row

—Removed rows 3–6

—Changed the max value for Iin at condition “Vin = OVDD or 0” in row 12 from 2

μA to 10 μA

—Changed the max value for Iin at condition “Vin = OVDD” in rows 13–15 from 2

μA to 10 μA

—Changed the max value for Iin at condition “Vin = 0 V” in row 15 from 36

μA to 40 μA

—Changed the max value for Iin at condition “Vin = 0 V” in row 16 from 2

μA to 10 μA

—Changed the max value for Iin at condition “Vin = OVDD” in row 16 from 36

μA to 40 μA

•In Table 11, "DDR2 I/O DC Electrical Parameters," on page 28:

—Added test condition “Ioh = -0.1 mA” in the first row

—Added test condition “Iol = 0.1 mA” in the second row

—Removed rows 3–4

•In Section 4, “Electrical Characteristics,” removed the note appearing after the first paragraph.

•In Section 4.2.1, “Power-Up Sequence,” updated the fifth bullet item to specify that VDD_ANA_PLL

can be used to power NVCC_CKIH and NVCC_RESET.

•In Section 4.3.2.2, “LPDDR2 Mode I/O DC Parameters,” added the sentence “The parameters in

Table 12 are guaranteed per the operating ranges in Table 6, unless otherwise noted.” before

Table 12.

•In Table 12, "LPDDR2 I/O DC Electrical Parameters," on page 29:

—Added test condition “Ioh = -0.1 mA” in the first row

—Added test condition “Iol = 0.1 mA” in the second row

•In Table 13, "DDR3 I/O DC Electrical Parameters," on page 29:

—Added test condition “Ioh = -0.1 mA” in the first row

—Added test condition “Iol = 0.1 mA” in the second row

•In Table 14, "LVIO DC Electrical Characteristics," on page 30:

—Added test condition “Ioh = -0.8 mA” in the first row

—Added test condition “Iol = 0.8 mA” in the second row

•In Table 15, "UHVIO DC Electrical Characteristics," on page 31:

—Changed test condition “Iout = -1 mA” to “Iout = -0.8 mA” in the first row

—Removed test condition “Iout= specified Ioh Drive” from the first row

—Removed “0.8 x OVDD” from the Min column of the first row

—Changed test condition “Iout = 1 mA” to “Iout = 0.8 mA” in the second row

—Removed test condition “Iout= specified Iol Drive” from the second row

—Removed “0.2 x OVDD” from the Max column of the second row

—Removed rows 3–6

Table 113. i.MX53 Data Sheet Document Revision History (continued)

Rev.

Number

Date

Substantive Change(s)

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