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EP3SE110 Datasheet(PDF) 324 Page - Altera Corporation |
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EP3SE110 Datasheet(HTML) 324 Page - Altera Corporation |
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324 / 341 page ![]() 1–314 Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics I/O Timing Stratix III Device Handbook, Volume 2 © July 2010 Altera Corporation Table 1–156 and Table 1–157 list the regional clock timing parameters for EP3SL110 devices. Table 1–158 and Table 1–159 list the periphery clock timing parameters for EP3SL110 devices. . Table 1–156. EP3SL110 Column Pin Regional Clock Timing Specifications Parameter Fast Model C2 C3 C4 C4L I3 I4 I4L Units Industrial Commercial V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V t CIN 1.689 1.687 2.360 2.600 2.924 2.836 3.241 2.600 2.924 2.836 3.241 ns t COUT 1.689 1.687 2.360 2.600 2.924 2.836 3.241 2.600 2.924 2.836 3.241 ns t PLLCIN -0.036 -0.038 -0.262 -0.317 -0.278 -0.239 -0.020 -0.317 -0.278 -0.239 -0.020 ns t PLLCOUT -0.036 -0.038 -0.262 -0.317 -0.278 -0.239 -0.020 -0.317 -0.278 -0.239 -0.020 ns Table 1–157. EP3SL110 Row Pin Regional Clock Timing Specifications Parameter Fast Model C2 C3 C4 C4L I3 I4 I4L Units Industrial Commercial V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V t CIN 1.684 1.792 2.440 2.644 2.985 2.879 3.044 2.720 3.044 2.938 3.083 ns t COUT 1.602 1.701 2.298 2.481 2.804 2.708 2.885 2.550 2.855 2.759 2.924 ns t PLLCIN 0.008 0.071 -0.189 -0.276 -0.218 -0.188 -0.214 -0.209 -0.174 -0.141 -0.263 ns t PLLCOUT -0.074 -0.020 -0.334 -0.439 -0.399 -0.359 -0.373 -0.379 -0.363 -0.320 -0.422 ns Table 1–158. EP3SL110 Column Pin Periphery Clock Timing Specifications Parameter Fast Model C2 C3 C4 C4L I3 I4 I4L Units Industrial Commercial V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V t CIN 1.541 1.538 2.257 2.539 2.931 2.810 3.345 2.539 2.931 2.810 3.345 ns t COUT 1.541 1.538 2.257 2.539 2.931 2.810 3.345 2.539 2.931 2.810 3.345 ns t PLLCIN -0.029 -0.031 -0.253 -0.310 -0.276 -0.222 -0.020 -0.310 -0.276 -0.222 -0.020 ns t PLLCOUT -0.029 -0.031 -0.253 -0.310 -0.276 -0.222 -0.020 -0.310 -0.276 -0.222 -0.020 ns Table 1–159. EP3SL110 Row Pin Periphery Clock Timing Specifications Parameter Fast Model C2 C3 C4 C4L I3 I4 I4L Units Industrial Commercial V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V t CIN 1.430 1.503 2.156 2.416 2.783 2.665 2.926 2.465 2.828 2.711 2.951 ns t COUT 1.348 1.412 2.011 2.253 2.602 2.494 2.767 2.295 2.639 2.532 2.792 ns t PLLCIN 0.015 0.072 -0.188 -0.267 -0.219 -0.180 -0.214 -0.206 -0.170 -0.133 -0.263 ns t PLLCOUT -0.067 -0.019 -0.333 -0.430 -0.400 -0.351 -0.373 -0.376 -0.359 -0.312 -0.422 ns |
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