LPC81XM_13 datasheet(22/71 Pages) NXP

22 / 71 page

LPC81xM

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 29 July 2013

22 of 71

NXP Semiconductors

LPC81xM

32-bit ARM Cortex-M0+ microcontroller

The analog comparator output is a movable function and is assigned to a pin through the

switch matrix. The comparator inputs and the voltage reference are enabled or disabled

on pins PIO0_0 and PIO0_1 through the switch matrix.

8.20.1 Features

• Selectable 0 mV, 10 mV ( 5 mV), and 20 mV ( 10 mV), 40 mV ( 20 mV) input

hysteresis.

• Two selectable external voltages (VDD or VDDCMP on pin PIO0_6); fully configurable

on either positive or negative input channel.

• Internal voltage reference from band gap selectable on either positive or negative

input channel.

• 32-stage voltage ladder with the internal reference voltage selectable on either the

positive or the negative input channel.

• Voltage ladder source voltage is selectable from an external pin or the main 3.3 V

supply voltage rail.

• Voltage ladder can be separately powered down for applications only requiring the

comparator function.

• Interrupt output is connected to NVIC.

• Comparator level output is connected to output pin ACMP_O.

• The comparator output can be routed internally to the SCT input through the switch

matrix.

Fig 8.

Comparator block diagram

LPC81XM Datasheet(PDF) 22 Page - NXP Semiconductors