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LPC81XM Datasheet(PDF) 14 Page - NXP Semiconductors

Part # LPC81XM
Description  32-bit ARM Cortex-M0 microcontroller; up to 16 kB flash and 4 kB SRAM
PDF  71 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC81XM Datasheet(HTML) 14 Page - NXP Semiconductors

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LPC81xM
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 29 July 2013
14 of 71
NXP Semiconductors
LPC81xM
32-bit ARM Cortex-M0+ microcontroller
8.8 I/O configuration
The IOCON block controls the configuration of the I/O pins. Each digital or mixed
digital/analog pin with the PIO0_n designator (except the true open-drain pins PIO0_10
and PIO0_11) in Table 4 can be configured as follows:
• Enable or disable the weak internal pull-up and pull-down resistors.
• Select a pseudo open-drain mode. The input cannot be pulled up above VDD.
Fig 6.
LPC81xM Memory map



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