PIC16LF1824 datasheet(271/440 Pages) MICROCHIP

271 / 440 page

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Preliminary

DS40001453D-page 271

PIC16(L)F1847

25.6.8

ACKNOWLEDGE SEQUENCE

TIMING

An Acknowledge sequence is enabled by setting the

Acknowledge Sequence Enable bit, ACKEN bit of the

SSPxCON2 register. When this bit is set, the SCLx pin is

pulled low and the contents of the Acknowledge data bit

are presented on the SDAx pin. If the user wishes to

generate an Acknowledge, then the ACKDT bit should

be cleared. If not, the user should set the ACKDT bit

before starting an Acknowledge sequence. The Baud

Rate Generator then counts for one rollover period

(TBRG) and the SCLx pin is deasserted (pulled high).

When the SCLx pin is sampled high (clock arbitration),

the Baud Rate Generator counts for TBRG. The SCLx pin

is then pulled low. Following this, the ACKEN bit is auto-

matically cleared, the Baud Rate Generator is turned off

and the MSSPx module then goes into Idle mode

(Figure 25-30).

25.6.8.1

WCOL Status Flag

If the user writes the SSPxBUF when an Acknowledge

sequence is in progress, then the WCOL bit is set and

the contents of the buffer are unchanged (the write

does not occur).

25.6.9

STOP CONDITION TIMING

A Stop bit is asserted on the SDAx pin at the end of a

receive/transmit by setting the Stop Sequence Enable

bit, PEN bit of the SSPxCON2 register. At the end of a

receive/transmit, the SCLx line is held low after the

falling edge of the ninth clock. When the PEN bit is set,

the master will assert the SDAx line low. When the

SDAx line is sampled low, the Baud Rate Generator is

reloaded and counts down to ‘0’. When the Baud Rate

Generator times out, the SCLx pin will be brought high

and one TBRG (Baud Rate Generator rollover count)

later, the SDAx pin will be deasserted. When the SDAx

pin is sampled high while SCLx is high, the P bit of the

SSPxSTAT register is set. A TBRG later, the PEN bit is

cleared and the SSPxIF bit is set (Figure 25-31).

25.6.9.1

WCOL Status Flag

If the user writes the SSPxBUF when a Stop sequence

is in progress, then the WCOL bit is set and the

contents of the buffer are unchanged (the write does

not occur).

FIGURE 25-30:

ACKNOWLEDGE SEQUENCE WAVEFORM

Note:

TBRG = one Baud Rate Generator period.

SDAx

SCLx

SSPxIF set at

Acknowledge sequence starts here,

write to SSPxCON2

ACKEN automatically cleared

Cleared in

TBRG

the end of receive

ACKEN = 1, ACKDT = 0

SSPxIF

software

SSPxIF set at the end

of Acknowledge sequence

Cleared in

software

ACK

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