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PIC16LF1824 Datasheet(PDF) 92 Page - Microchip Technology |
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PIC16LF1824 Datasheet(HTML) 92 Page - Microchip Technology |
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92 / 440 page  PIC16(L)F1847 DS40001453D-page 92 Preliminary 2011-2013 Microchip Technology Inc. REGISTER 8-5: PIE4: PERIPHERAL INTERRUPT ENABLE REGISTER 4 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0/0 R/W-0/0 — — — — — — BCL2IE SSP2IE bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-2 Unimplemented: Read as ‘0’ bit 1 BCL2IE: MSSP2 Bus Collision Interrupt Enable bit 1 = Enables the MSSP2 Bus Collision Interrupt 0 = Disables the MSSP2 Bus Collision Interrupt bit 0 SSP2IE: Master Synchronous Serial Port 2 (MSSP2) Interrupt Enable bit 1 = Enables the MSSP2 interrupt 0 = Disables the MSSP2 interrupt Note 1: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt. |
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