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PIC16LF1824 Datasheet(PDF) 295 Page - Microchip Technology |
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PIC16LF1824 Datasheet(HTML) 295 Page - Microchip Technology |
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295 / 440 page  2011-2013 Microchip Technology Inc. Preliminary DS40001453D-page 295 PIC16(L)F1847 TABLE 26-2: SUMMARY OF REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page APFCON0 RXDTSEL SDO1SEL SS1SEL P2BSEL CCP2SEL P1DSEL P1CSEL CCP1SEL 118 APFCON1 — — — — — — — TXCKSEL 118 BAUDCON ABDOVF RCIDL — SCKP BRG16 — WUE ABDEN 298 INTCON GIE PEIE TMR0IE INTE IOCE TMR0IF INTF IOCF 88 PIE1 TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 89 PIR1 TMR1GIF ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF 93 RCREG EUSART Receive Data Register 292* RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 297 SPBRGL BRG<7:0> 299* SPBRGH BRG<15:8> 299* TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 126 TXSTA CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 296 Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for Asynchronous Reception. * Page provides register information. |
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