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MCP25020I/P Datasheet(PDF) 31 Page - Microchip Technology |
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MCP25020I/P Datasheet(HTML) 31 Page - Microchip Technology |
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31 / 66 page ![]() © 2007 Microchip Technology Inc. DS21664D-page 31 MCP2502X/5X 5.0 GPIO MODULE 5.1 Description The MCP2502X/5X has eight general-purpose input/ output pins (GP0 to GP7), collectively labeled GPIO. All GPIO port pins have TTL input levels and full CMOS output drivers, with the exception of GP7, which is input only. Pins GP6:GP0 can be individually configured as input or output via the GPDDR register. Each of the GPIO pins has a weak internal pull-up resistor. A single control bit (OPTREG.GPPU) can turn on/off all the pull-ups. The weak pull-up is automatically turned off when the port pin is configured as an output. The pull-ups are disabled during a Power-on Reset. All pins are multiplexed with an alternate function, including analog-to-digital conversion on up to four of the GPIO pins, analog VREF inputs up to two pins, PWM outputs up to two pins, clock-out function and external reset. The operation of each pin is selected by clearing, or setting, control bits in various control registers. GPIO pin functions are summarized in Table 5-1. TABLE 5-1: GPIO FUNCTIONS 5.2 Digital Input Edge Detection All GPIO pins have a digital input edge detection feature that will automatically transmit a message when an edge with the proper polarity occurs on any of the digital inputs. Only pins configured as inputs and enabled for this function via control register IOINTPO will perform this operation. Three control registers are associated with this function. An enable pin for each GPIO pin resides in the IOINTEN register. When a bit is set to a '1', the corresponding GPIO pin is enabled to generate a transmit-on-change message (TXID2) when an edge of specified polarity occurs. The digital edge detection function on a GPIO pin configured as a digital input is edge triggered. A rising- edge will generate a transmission if the corresponding bit in the IOINTPO register is set. A falling-edge will generate a transmission if the bit is cleared. When a valid edge appears on the enabled GPIO pin, CAN message TXID2 is initiated. The edge-detection function on any given GPIO pin (configured as a digital input) can wake up the processor from SLEEP if the corresponding interrupt enable bit in the IOINTEN register was set prior to going into SLEEP mode. If a wake-up from SLEEP is caused in this manner, the device will immediately initiate a transmit message (TXID2). Note: The GPDDR register controls the direction of the GPIO pins, even when they are being used as analog inputs. The user must ensure that the bits in the GPDDR register are maintained set (input) when using them as analog inputs. Name Bit # Function GP0/AN0 bit0 I/O or analog input GP1/AN1 bit1 I/O or analog input GP2/AN2/PWM2 bit2 I/O, analog input or PWM out GP3/AN3/PWM3 bit3 I/O, analog input or PWM out GP4/VREF- bit4 I/O or analog voltage reference GP5/VREF+ bit5 I/O or analog voltage reference GP6/CLKOUT bit6 I/O or Clock output GP7/nRST/VPP bit7 Input, external reset input or programming voltage input Note: Refer to Section 7.4 “A/D Threshold Detection” for information regarding A/D channels. |
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