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AS3661 Datasheet(PDF) 53 Page - ams AG

Part # AS3661
Description  Programmable 9-channel LED Dr iver
PDF  87 Pages
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Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

AS3661 Datasheet(HTML) 53 Page - ams AG

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Revision 1.3
52 - 85
AS3661
Datasheet - D e t a i l e d D e s c r i p t i o n
8.10.9 ENGINEx PC
The program counter defines the starting value for each program execution engine. It can be any value between 000
0000 to 101 1111. The maximum value depends on program memory allocation between the three program execution
engines.
8.10.10 STATUS/INTERRUPT
This register contains several status and interrupt registers.
Table 42. ENGINE1 PC Register
Register: 0x37
ENGINE1 PC
Bit
Bit Name
Default
Access
Bit Description
6:0
ENGINE1_PC
000 0000
R/W
Program counter value for execution engine1 from 000 0000 to
101 1111 depending on the memory allocation of the
application.
Table 43. ENGINE2 PC Register
Register: 0x38
ENGINE2 PC
Bit
Bit Name
Default
Access
Bit Description
6:0
ENGINE2_PC
000 0000
R/W
Program counter value for execution engine2 from 000 0000 to
101 1111 depending on the memory allocation of the
application.
Table 44. ENGINE3 PC Register
Register: 0x39
ENGINE3 PC
Bit
Bit Name
Default
Access
Bit Description
6:0
ENGINE3_PC
000 0000
R/W
Program counter value for execution engine 3 from 000 0000
to 101 1111 depending on the memory allocation of the
application.
Table 45. STATUS / INTERRUPT Register
Register: 0x3A
STATUS / INTERRUPT
Bit
Bit Name
Default
Access
Bit Description
7
LEDTEST_MEAS_D
ONE
0
R/W
This bit indicates when the LED test is done, and the result is
written to the LED_TEST_ADC register (0x42). Typically the
conversion takes 2.7 milliseconds to complete. The bit will not
be cleared after conversion. Each write command to this
register starts another conversion.
0: LED test not done.
1: LED test done.
6
MASK_BUSY
1
R/W
Mask bit for interrupts generated by STARTUP_BUSY or
ENGINE_BUSY.
0: External interrupt will be generated when STARTUP_BUSY
or ENGINE_BUSY condition is no longer true. Reading the
register 3A clears the status bits [5:4] and releases INT pin to
high state.
1: Interrupt events will be masked i.e. no external interrupt
will be generated from STARTUP_BUSY or ENGINE_BUSY
event (default).



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