| Electronic Components Datasheet Search |
|
DOC7707 Datasheet(PDF) 223 Page - List of Unclassifed Manufacturers |
|
|
|||||||||||||||||||||||||||||
DOC7707 Datasheet(HTML) 223 Page - List of Unclassifed Manufacturers |
|
223 / 307 page ![]() 223 7707F–AVR–11/10 AT90USB82/162 22. Analog Comparator The Analog Comparator compares the input values on the positive pin AIN0 and negative pin AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pin AIN1, the Analog Comparator output, ACO, is set. The comparator’s output can be set to trigger the Timer/Counter1 Input Capture function. In addition, the comparator can trigger a separate interrupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on com- parator output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is shown in Figure 22-1. User can also replace by software the AIN0 input by the internal Bandgap reference. Figure 22-1. Analog Comparator Block Diagram (1) Notes: 1. Refer to Figure 1-1 on page 3 and Table 11-9 on page 79 for Analog Comparator pin placement. 22.0.1 Analog Comparator Control and Status Register – ACSR • Bit 7 – ACD: Analog Comparator Disable When this bit is written logic one, the power to the Analog Comparator is switched off. This bit can be set at any time to turn off the Analog Comparator. This will reduce power consumption in Active and Idle mode. When changing the ACD bit, the Analog Comparator Interrupt must be disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is changed. • Bit 6 – ACBG: Analog Comparator Bandgap Select When this bit is set, a fixed bandgap reference voltage replaces the positive input to the Analog Comparator. When this bit is cleared, AIN0 is applied to the positive input of the Analog Compar- ator. See “Internal Voltage Reference” on page 52. • Bit 5 – ACO: Analog Comparator Output The output of the Analog Comparator is synchronized and then directly connected to ACO. The synchronization introduces a delay of 1 - 2 clock cycles. ACBG BANDGAP REFERENCE Bit 7654 3 2 1 0 ACD ACBG ACO ACI ACIE ACIC ACIS1 ACIS0 ACSR Read/Write R/W R/W R R/W R/W R/W R/W R/W Initial Value 0 0 N/A 0 0 0 0 0 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |