DM163006 datasheet(153/320 Pages) MICROCHIP

153 / 320 page

 2001 Microchip Technology Inc.

Advance Information

DS39541A-page 153

PIC18C601/801

15.3

SPI Mode

The SPI mode allows 8 bits of data to be synchronously

transmitted and received, simultaneously. All four

modes of SPI are supported. To accomplish communi-

cation, typically three pins are used:

• Serial Data Out (SDO) - RC5/SDO

• Serial Data In (SDI) - RC4/SDI/SDA

• Serial Clock (SCK) - RC3/SCK/SCL/LVOIN

Additionally, a fourth pin may be used when in any

Slave mode of operation:

• Slave Select (SS) - RA5/SS/AN4

15.3.1

OPERATION

When initializing the SPI, several options need to be

specified. This is done by programming the appropriate

control bits SSPCON1<5:0> and SSPSTAT<7:6>.

These control bits allow the following to be specified:

• Master mode (SCK is the clock output)

• Slave mode (SCK is the clock input)

• Clock polarity (Idle state of SCK)

• Data input sample phase (middle or end of data

output time)

• Clock edge (output data on rising/falling edge of

SCK)

• Clock rate (Master mode only)

• Slave Select mode (Slave mode only)

Figure 15-1 shows the block diagram of the MSSP

module, when in SPI mode.

FIGURE 15-1:

MSSP BLOCK DIAGRAM

(SPI MODE)

(

)

Read

Write

Internal

Data Bus

SSPSR reg

SSPM3:SSPM0

bit0

Shift

Clock

SS Control

Enable

Edge

Select

Clock Select

TMR2 Output

TOSC

Prescaler

4, 16, 64

Edge

Select

Data to TX/RX in SSPSR

TRIS bit

SMP:CKE

SDI

SDO

SCK

Note:

I/O pins have diode protection to VDD and VSS.

SSPBUF reg

DM163006 Datasheet(PDF) 153 Page - Microchip Technology

DM163006 Datasheet(HTML) 153 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL