DM163006 datasheet(150/320 Pages) MICROCHIP

150 / 320 page

PIC18C601/801

DS39541A-page 150

Advance Information

 2001 Microchip Technology Inc.

15.2

Control Registers

The MSSP module has three associated registers.

These include a status register and two control registers.

(SSPSTAT), Register 15-2 shows the MSSP Control

MSSP Control Register 2 (SSPCON2).

SSPSTAT REGISTER

R/W-0

R-0

SMP

CKE

D/A

R/W

bit 7

bit 0

bit 7

SMP: Sample bit

SPI Master mode:

= Input data sampled at end of data output time

= Input data sampled at middle of data output time

SPI Slave mode:

SMP must be cleared when SPI is used in Slave mode

In I2C Master or Slave mode:

= Slew rate control disabled for standard speed mode (100 kHz and 1 MHz)

= Slew rate control enabled for high speed mode (400 kHz)

bit 6

CKE: SPI Clock Edge Select

CKP = 0:

= Data transmitted on rising edge of SCK

= Data transmitted on falling edge of SCK

CKP = 1:

= Data transmitted on falling edge of SCK

= Data transmitted on rising edge of SCK

bit 5

D/A: Data/Address bit (I2C mode only)

= Indicates that the last byte received or transmitted was data

= Indicates that the last byte received or transmitted was address

bit 4

P: STOP bit

(I2C mode only. This bit is cleared when the MSSP module is disabled, SSPEN is cleared.)

= Indicates that a STOP bit has been detected last (this bit is ’0’ on RESET)

= STOP bit was not detected last

bit 3

S: START bit

(I2C mode only. This bit is cleared when the MSSP module is disabled, SSPEN is cleared.)

= Indicates that a START bit has been detected last (this bit is ’0’ on RESET)

= START bit was not detected last

bit 2

R/W: Read/Write bit Information (I2C mode only)

This bit holds the R/W bit information following the last address match. This bit is only valid from

the address match to the next START bit, STOP bit, or not ACK bit.

In I2C Slave mode:

= Read

= Write

In I2C Master mode:

= Transmit is in progress

= Transmit is not in progress.

OR-ing this bit with SEN, RSEN, PEN, RCEN, or ACKEN will indicate if the MSSP is in IDLE mode.

bit 1

UA: Update Address (10-bit I2C mode only)

= Indicates that the user needs to update the address in the SSPADD register

= Address does not need to be updated

bit 0

BF: Buffer Full Status bit

Receive (SPI and I2C modes):

= Receive complete, SSPBUF is full

= Receive not complete, SSPBUF is empty

Transmit (I2C mode only):

= Data transmit in progress (does not include the ACK and STOP bits), SSPBUF is full

= Data transmit complete (does not include the ACK and STOP bits), SSPBUF is empty

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

’1’ = Bit is set

’0’ = Bit is cleared

x = Bit is unknown

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