DM163006 datasheet(198/320 Pages) MICROCHIP

198 / 320 page

PIC18C601/801

DS39541A-page 198

Advance Information

 2001 Microchip Technology Inc.

17.1

A/D Acquisition Requirements

For the A/D converter to meet its specified accuracy,

the charge holding capacitor (CHOLD) must be allowed

to fully charge to the input channel voltage level. The

analog input model is shown in Figure 17-2. The

source impedance (RS) and the internal sampling

switch (RSS) impedance directly affect the time

required to charge the capacitor CHOLD. The sampling

switch (RSS) impedance varies over the device voltage

(VDD). The source impedance affects the offset voltage

at the analog input (due to pin leakage current). The

maximum recommended impedance for analog

sources is 2.5k

Ω. After the analog input channel is

selected (changed), this acquisition must be done

before the conversion can be started.

calculate

the

minimum

acquisition

time,

Equation 17-1 may be used. This equation assumes

that 1/2 LSb error is used (1024 steps for the A/D). The

1/2 LSb error is the maximum error allowed for the A/D

to meet its specified resolution.

Example 17-1 shows the calculation of the minimum

required acquisition time TACQ. This calculation is

based on the following application system assumptions:

CHOLD

120 pF

2.5 k

Ω

Conversion Error

≤

1/2 LSb

VDD

→ Rss = 7 kΩ

Temperature

°C (system max.)

VHOLD

=0V @ time = 0

EQUATION 17-1:

ACQUISITION TIME

EQUATION 17-2:

A/D MINIMUM CHARGING TIME

EXAMPLE 17-1: CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME

Note:

When the conversion is started, the hold-

ing capacitor is disconnected from the

input pin.

TACQ

Amplifier Settling Time +

Holding Capacitor Charging Time +

Temperature Coefficient

=TAMP + TC + TCOFF

VHOLD

(VREF - (VREF/2048)) • (1 - e(-Tc/C

HOLD

(RIC + RSS + RS)))

-(120 pF)(1 k

Ω + RSS + RS) ln(1/2047)

TACQ

=TAMP + TC + TCOFF

Temperature coefficient is only required for temperatures > 25

°C.

TACQ

µs + TC + [(Temp - 25°C)(0.05 µs/°C)]

=-CHOLD (RIC + RSS + RS) ln(1/2047)

-120 pF (1 k

Ω + 7 kΩ + 2.5 kΩ) ln(0.0004885)

-120 pF (10.5 k

Ω) ln(0.0004885)

-1.26

µs (-7.6241)

9.61

µs

TACQ

µs + 9.61 µs + [(50°C - 25°C)(0.05 µs/°C)]

11.61

µs + 1.25 µs

12.86

µs

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