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DM163006 Datasheet(PDF) 197 Page - Microchip Technology

Part # DM163006
Description  High-Performance ROM-less Microcontrollers
PDF  320 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DM163006 Datasheet(HTML) 197 Page - Microchip Technology

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 2001 Microchip Technology Inc.
Advance Information
DS39541A-page 197
PIC18C601/801
The value in the ADRESH/ADRESL registers is not
modified for a Power-on Reset. The ADRESH/ADRESL
registers will contain unknown data after a Power-on
Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 17.1.
After this acquisition time has elapsed, the A/D conver-
sion can be started. The following steps should be fol-
lowed to do an A/D conversion:
1.
Configure the A/D module:
•
Configure analog pins, voltage reference
and digital I/O (ADCON1)
•
Select A/D input channel (ADCON0)
•
Select A/D conversion clock (ADCON2)
•
Turn on A/D module (ADCON0)
2.
Configure A/D interrupt (if desired):
•
Clear ADIF bit
•
Set ADIE bit
•
Set GIE bit
3.
Wait the required acquisition time.
4.
Start conversion:
•
Set GO/DONE bit (ADCON0 register)
5.
Wait for A/D conversion to complete, by either:
•
Polling for the GO/DONE bit to be cleared,
OR
•
Waiting for the A/D interrupt
6.
Read A/D Result registers (ADRESH:ADRESL);
clear bit ADIF, if required.
7.
For next conversion, go to step 1 or step 2, as
required. The A/D conversion time per bit is
defined as TAD. A minimum wait of 2TAD is
required before next acquisition starts.
FIGURE 17-2:
ANALOG INPUT MODEL
VAIN
CPIN
Rs
ANx
5 pF
VDD
VT = 0.6 V
VT = 0.6 V
I leakage
RIC
≤ 1 k
Sampling
Switch
SS
RSS
CHOLD = 120 pF
VSS
6V
Sampling Switch
5V
4V
3V
2V
567 8 9 10 11
( k
Ω )
VDD
± 500 nA
Legend: CPIN
VT
I LEAKAGE
RIC
SS
CHOLD
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
= sampling switch resistance
RSS



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