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DM163006 Datasheet(PDF) 200 Page - Microchip Technology

Part # DM163006
Description  High-Performance ROM-less Microcontrollers
PDF  320 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DM163006 Datasheet(HTML) 200 Page - Microchip Technology

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PIC18C601/801
DS39541A-page 200
Advance Information
 2001 Microchip Technology Inc.
17.4
A/D Conversions
Figure 17-3 shows the operation of the A/D converter
after the GO bit has been set. Clearing the GO/DONE
bit during a conversion will abort the current conver-
sion. The A/D result register pair will NOT be updated
with the partially completed A/D conversion sample.
That is, the ADRESH:ADRESL registers will continue
to contain the value of the last completed conversion
(or the last value written to the ADRESH:ADRESL reg-
isters). After the A/D conversion is aborted, a 2TAD wait
is required before the next acquisition is started. After
this 2TAD wait, acquisition on the selected channel is
automatically started.
17.5
Use of the CCP2 Trigger
An A/D conversion can be started by the “special event
trigger” of the CCP2 module. This requires that the
CCP2M3:CCP2M0
bits
(CCP2CON<3:0>)
be
pro-
grammed as 1011, and that the A/D module is enabled
(ADON bit is set). When the trigger occurs, the GO/DONE
bit will be set, starting the A/D conversion and the Timer1
(or Timer3) counter will be reset to zero. Timer1 (or
Timer3) is reset to automatically repeat the A/D acquisi-
tion period with minimal software overhead (moving
ADRESH/ADRESL to the desired location). The appropri-
ate analog input channel must be selected and the mini-
mum acquisition done before the “special event trigger”
sets the GO/DONE bit (starts a conversion).
If the A/D module is not enabled (ADON is cleared), the
“special event trigger” will be ignored by the A/D mod-
ule, but will still reset the Timer1 (or Timer3) counter.
FIGURE 17-3:
A/D CONVERSION TAD CYCLES
Note:
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
TAD1 TAD2 TAD3 TAD4 TAD5 TAD6 TAD7 TAD8
TAD11
Set GO bit
Holding capacitor is disconnected from analog input (typically 100 ns)
b9
b9
b8
b7
b6
b5
b4
b3
TAD9 TAD10
b2
b1
TCY - TAD
Next Q4: ADRESH/ADRESL is loaded, GO bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
Conversion Starts
b0



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