AM3894 datasheet(69/308 Pages) TI

69 / 308 page

AM3894

AM3892

www.ti.com

SPRS681E – OCTOBER 2010 – REVISED JULY 2012

Table 3-10. McASP1 Terminal Functions

SIGNAL

TYPE(1)

OTHER(2) (3)

MUXED

DESCRIPTION

NAME

NO.

PULL: IPD / IPD

MCA[1]_ACLKR

AK36

I/O

DRIVE: Z / Z

McASP1 Receive Bit Clock I/O

PINCTRL139

DVDD_3P3

PULL: IPD / IPD

MCA[1]_AHCLKR

AL37

I/O

DRIVE: Z / Z

McASP1 Receive High-Frequency Master Clock I/O

PINCTRL140

DVDD_3P3

PULL: IPD / IPD

MCA[1]_AFSR

AK35

I/O

DRIVE: Z / Z

McASP1 Receive Frame Sync I/O

PINCTRL141

DVDD_3P3

GP0[6]/

PULL: IPD / IPD

GP0, GPMC

MCA[1]_AMUTEIN/

DRIVE: Z / Z

McASP1 Mute Input

PINCTRL297

GPMC_A[23]

DVDD_3P3

PULL: IPD / IPD

MCA[1]_ACLKX

AL36

I/O

DRIVE: Z / Z

McASP1 Transmit Bit Clock I/O

PINCTRL142

DVDD_3P3

PULL: IPD / IPD

MCA[1]_AHCLKX

AM37

I/O

DRIVE: Z / Z

McASP1 Transmit High-Frequency Master Clock I/O

PINCTRL143

DVDD_3P3

PULL: IPD / IPD

MCA[1]_AFSX

AK34

I/O

DRIVE: Z / Z

McASP1 Transmit Frame Sync I/O

PINCTRL144

DVDD_3P3

PULL: IPD / IPD

MCA[1]_AMUTE

AK33

DRIVE: Z / Z

McASP1 Mute Output

PINCTRL145

DVDD_3P3

PULL: IPD / IPD

MCA[1]_AXR[1]

AK32

I/O

DRIVE: Z / Z

PINCTRL147

DVDD_3P3

McASP1 Transmit/Receive Data I/Os

PULL: IPD / IPD

MCA[1]_AXR[0]

AL33

I/O

DRIVE: Z / Z

PINCTRL146

DVDD_3P3

(1)

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal.

(2)

PULL: A / B, where:

A is the state of the internal pull resistor during POR reset

B is the state of the internal pull resistor after POR and Warm reset are de-asserted and during Warm reset

IPD = Internal Pulldown Enabled, IPU = Internal Pullup Enabled, DIS = Internal Pull Disabled

DRIVE: A / B, where;

A is the driving state of the pin during POR reset

B is the driving state of the pin after POR and Warm reset are de-asserted and during Warm reset

H = Driving High, L = Driving Low, Z = 3-State

For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see

Section 4.2.1, Pullup/Pulldown Resistors.

(3)

Specifies the operating I/O supply voltage for each signal.

Device Pins

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