AM3894 datasheet(74/308 Pages) TI

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AM3894

AM3892

SPRS681E – OCTOBER 2010 – REVISED JULY 2012

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3.2.12 Reset, Interrupts, and JTAG Interface Signals

Table 3-15. RESET, Interrupts, and JTAG Terminal Functions

SIGNAL

TYPE(1)

OTHER(2) (3)

MUXED

DESCRIPTION

NAME

NO.

RESET

PULL: IPD / IPU

RESET

G33

DRIVE: Z / Z

Device Reset input

PINCTRL316

DVDD_3P3

IPU

POR

F37

Power-On Reset input

DVDD_3P3

Reset output

PULL: DIS / DIS

RSTOUT

G37

For more detailed information on RSTOUT pin

DVDD_3P3

PINCTRL318

behavior, see Section 7.2.13

INTERRUPTS

PULL: IPD / IPU

NMI

G36

DRIVE: Z / Z

External active low maskable interrupt

PINCTRL317

DVDD_3P3

Interrupt-capable general-purpose I/Os

NOTE: All pins are multiplexed with other pin

see

GP0[31:3]

I/O

see NOTE

functions. For muxing and internal

Table 3-5

pullup/pulldown/disable details, see Table 3-5, GPIO

Terminal Functions.

Interrupt-capable general-purpose I/Os

NOTE: All pins are multiplexed with other pin

see

GP1[31:0]

I/O

see NOTE

functions. For muxing and internal

Table 3-5

pullup/pulldown/disable details, see Table 3-5, GPIO

Terminal Functions.

JTAG

PULL: IPU / IPU

TCLK

J37

DRIVE: H / H

JTAG test clock input

PINCTRL305

DVDD_3P3

PULL: IPD / DIS

RTCK

J36

DRIVE: L / H

JTAG return clock output

PINCTRL306

DVDD_3P3

PULL: IPU / IPU

TDI

J34

DRIVE: H / H

JTAG test data input

PINCTRL307

DVDD_3P3

PULL: IPD / DIS

TDO

N30

DRIVE: Z / Z

JTAG test port data output

PINCTRL308

DVDD_3P3

PULL: IPU / IPU

JTAG test port mode select input. For proper

TMS

N31

DRIVE: Z / Z

PINCTRL309

operation, do not oppose the IPU on this pin.

DVDD_3P3

PULL: IPD / IPD

TRST

K36

DRIVE: L / L

JTAG test port reset input

PINCTRL310

DVDD_3P3

PULL: IPU / IPU

EMU4

M37

I/O

DRIVE: Z / Z

Emulator pin 4

PINCTRL315

DVDD_3P3

(1)

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal.

(2)

PULL: A / B, where:

A is the state of the internal pull resistor during POR reset

B is the state of the internal pull resistor after POR and Warm reset are de-asserted and during Warm reset

IPD = Internal Pulldown Enabled, IPU = Internal Pullup Enabled, DIS = Internal Pull Disabled

DRIVE: A / B, where;

A is the driving state of the pin during POR reset

B is the driving state of the pin after POR and Warm reset are de-asserted and during Warm reset

H = Driving High, L = Driving Low, Z = 3-State

For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see

Section 4.2.1, Pullup/Pulldown Resistors.

(3)

Specifies the operating I/O supply voltage for each signal.

Device Pins

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