AT90USB646 datasheet(197/456 Pages) ATMEL

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197

7593L–AVR–09/12

AT90USB64/128

• Bit 3 – USBSn: Stop Bit select

This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver ignores

this setting.

• Bit 2:1 – UCSZn1:0: Character size

The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data bits

(Character SiZe) in a frame the Receiver and Transmitter use.

• Bit 0 – UCPOLn: Clock polarity

This bit is used for synchronous mode only. Write this bit to zero when asynchronous mode is

used. The UCPOLn bit sets the relationship between data output change and data input sample,

and the synchronous clock (XCKn).

19.9.5

UBRRLn and UBRRHn – USART baud rate registers

Table 19-6.

USBS bit settings.

USBSn

Stop bit(s)

01-bit

12-bit

Table 19-7.

UCSZn bits settings.

UCSZn2

UCSZn1

UCSZn0

Character size

5-bit

6-bit

7-bit

8-bit

100

Reserved

101

Reserved

110

Reserved

9-bit

Table 19-8.

UCPOLn bit settings.

UCPOLn

Transmitted data changed

(output of TxDn pin)

Received data sampled

(input on RxDn pin)

Rising XCKn edge

Falling XCKn edge

Rising XCKn edge

Bit

141312

1110

–

UBRR[11:8]

UBRRHn

UBRR[7:0]

UBRRLn

Read/write

R/W

Initial value

AT90USB646 Datasheet(PDF) 197 Page - ATMEL Corporation

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