1

2

3

4

5

6

7

8

9

10

10m

100m

1

10

100

TEMPERATURE DRIFT (°C)

12 bit Accuracy

11 bit Accuracy

10 bit Accuracy

9 bit Accuracy

8 bit Accuracy

LMP91050

SNAS517D – NOVEMBER 2011 – REVISED MARCH 2013

www.ti.com

Figure 30. System Accuracy vs. TCVOS and Temperature Drift

COMMON MODE GENERATION

As the sensor's offset is bipolar, there is a need to supply a VCM to the sensor. This can be programmed as

1.15V or 2.59V (approximately mid rail of 3.3V or 5V supply). It is not recommended to use 2.59V VCM with 3.3V

supply

SPI INTERFACE

An SPI interface is available in order to program the device parameters like PGA gain of two stages, enabling

external filter, enabling power for PGAs, offset adjust and common mode (VCM) voltage.

Interface Pins

The Serial Interface consists of SDIO (Serial Data Input / Output), SCLK (Serial Interface Clock) and CSB (Chip

Select Bar). The serial interface is write-only by default. Read operations are supported after unlocking the

SDIO_MODE_PASSWD. This is discussed in detail later in the document.

CSB

Chip Select is a active-low signal. CSB needs to be asserted throughout a transaction. That is, CSB should not

pulse between the Instruction Byte and the Data Byte of a single transaction.

Note that CSB de-assertion always terminates an on-going transaction, if it is not already complete. Likewise,

CSB assertion will always bring the device into a state, ready for next transaction, regardless of the termination

status of a previous transaction.

CSB may be permanently tied low for a 2-wire SPI communication protocol.

SCLK

SCLK can idle High or Low for a write transaction. However, for a READ transaction, SCLK should idle high.

SCLK features a Schmitt-triggered input and although it has hysterisis, it is recommened to keep SCLK as clean

as possible to prevent glitches from inadvertently spoiling the SPI frame.

Communication Protocol

Communication on the SPI normally involves Write and Read transactions. Write transaction consists of single

Write Command Byte, followed by single Data byte. The following figure shows the SPI Interface Protocol for

write transaction.

14

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