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AM79C960KC Datasheet(PDF) 69 Page - Advanced Micro Devices

Part # AM79C960KC
Description  PCnetTM-ISA Single-Chip Ethernet Controller
PDF  127 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C960KC Datasheet(HTML) 69 Page - Advanced Micro Devices

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P R E L I M I N A R Y
AMD
1-411
Am79C960
CSR50-51: Temporary Storage
Bit
Name
Description
31-0
TMP1
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
CSR52-53: Temporary Storage
Bit
Name
Description
31-0
TMP2
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
CSR54-55: Temporary Storage
Bit
Name
Description
31-0
TMP3
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
CSR56-57: Temporary Storage
Bit
Name
Description
31-0
TMP4
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
CSR58-59: Temporary Storage
Bit
Name
Description
31-0
TMP5
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
CSR60-61: Previous Transmit Descriptor Address
Bit
Name
Description
31-24
RES
Reserved locations. Written as
zero and read as undefined.
23-0
PXDA
Contains the previous TDRE ad-
dress pointer. The PCnet-ISA
controller has the capability to
stack multiple transmit frames.
Read/write accessible only when
STOP bit is set.
CSR62-63: Previous Transmit Status and Byte
Count
Bit
Name
Description
31-24
PXST
Previous Transmit Status. This
field is a copy of bits 15:8 of
TMD1 of the previous transmit
descriptor.
Read/write accessible only when
STOP bit is set.
23-12
RES
Reserved locations. Written as
zero and read as undefined.
Accessible only when STOP bit is
set.
11-0
PXBC
Previous Transmit Byte Count.
This field is a copy of the BCNT
field of TMD2 of the previous
transmit descriptor.
Read/write accessible only when
STOP bit is set.
CSR64-65: Next Transmit Buffer Address
Bit
Name
Description
31-24
RES
Reserved locations. Written as
zero and read as undefined.
23-0
NXBA
Contains the next transmit buffer
address
from
which
the
PCnet-ISA controller will transmit
an outgoing frame.
Read/write accessible only when
STOP bit is set.
CSR66-67: Next Transmit Status and Byte Count
Bit
Name
Description
31-24
NXST
Next Transmit Status. This field
is a copy of bits 15:8 of TMD1 of
the next transmit descriptor.
Read/write accessible only when
STOP bit is set.
23-12
RES
Reserved locations. Written as
zero and read as undefined.
Accessible only when STOP bit is
set.
11-0
NXBC
Next Transmit Byte Count. This
field is a copy of the BCNT field of
TMD2
of
the
next
transmit
descriptor.
Read/write accessible only when
STOP bit is set.



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