AM79C974 datasheet(31/153 Pages) AMD

Part #	AM79C974

Description	PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems

PDF	153 Pages

Scroll/Zoom	100%

Manufacturer	AMD [Advanced Micro Devices]

Direct Link	http://www.amd.com

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31 / 153 page

P R E L I M I N A R Y

AMD

Am79C974

Bus Acquisition

The Am79C974 microcode (in the buffer management

section) will determine when a DMA transfer should be

initiated. The first step in any Am79C974 bus master

transfer is to acquire ownership of the bus. This task is

handled by synchronous logic within the BIU. Bus own-

ership is requested with the

REQ signal and ownership

is granted by the arbiter through the

GNT signal.

Figure 5 shows the Am79C974 controller bus acquisi-

tion.

GNT is asserted at clock 3. The Am79C974 control-

ler starts driving AD[31:00] and C/

BE[3:0] prior to clock

FRAME is asserted at clock 5 indicating a valid ad-

dress and command on AD[31:00] and C/

BE[3:0].

ADSTEP (bit 7) in the PCI Command register is set to

ONE to indicated that the Am79C974 controller uses ad-

dress stepping. Address stepping is only used for the

first address phase of a bus master period.

18681A-9

FRAME

CLK

REQ

GNT

12345

ADDR

CMD

Figure 5. Bus Acquisition

AM79C974 Datasheet(PDF) 31 Page - Advanced Micro Devices