AM79C974 datasheet(36/153 Pages) AMD

Part #	AM79C974

Description	PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems

PDF	153 Pages

Scroll/Zoom	100%

Manufacturer	AMD [Advanced Micro Devices]

Direct Link	http://www.amd.com

Logo

36 / 153 page

AMD

P R E L I M I N A R Y

Am79C974

Basic Burst Write Cycles

All Am79C974 controller burst write transfers are of the

PCI command type Memory Write (type 7). AD[1:0] will

both be ZERO during the address phase indicating a lin-

ear burst order. All four byte enable signals will be ZERO

during the data phase as the Am79C974 controller al-

ways writes a full 32-bit word when in burst mode.

Figure 10 shows a typical burst write access. The

Am79C974 controller arbitrates for the bus, is granted

access, and writes four 32-bit words (DWORDs) from

system memory and then releases the bus. In this ex-

ample, the memory system extends the data phase of

the first access by one wait state. The following three

data phases take one clock cycle each, which is deter-

mined by the timing of

TRDY.

18681A-14

FRAME

CLK

IRDY

TRDY

DEVSEL

REQ

GNT

12345678

ADDR

DATA

0000

0111

PAR

DEVSEL is sampled by the Am79C974 controller.

DATA

PAR

Figure 10. Burst Write Cycles

AM79C974 Datasheet(PDF) 36 Page - Advanced Micro Devices