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TLC32046MFKB Datasheet(PDF) 36 Page - Texas Instruments |
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TLC32046MFKB Datasheet(HTML) 36 Page - Texas Instruments |
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36 / 56 page ![]() 3–6 3.4 Operating Characteristics Over Recommended Operating Free-Air Temperature Range, VCC+ = 5 V, VCC– = –5 V, VDD = 5 V 3.4.1 Receive and Transmit Noise (measurement includes low-pass and band-pass switched-capacitor filters) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT Broadband with (sin x)/x 250 500 Broadband without (sin x)/x 200 450 0 to 30 kHz with (sin x)/x 200 400 0 to 30 kHz without (sin x)/x 200 400 Tit 0 to 3.4 kHz with (sin x)/x DX i t 00000000000000 180 300 Transmit noise 0 to 3.4 kHz without (sin x)/x DX input = 00000000000000, Constant input code 160 300 µVrms noise 0 to 6.8 kHz with (sin x)/x (wide-band operation with 7.2 kHz roll-off) Constant in ut code 180 350 µ 0 to 6.8 kHz without (sin x)/x (wide-band operation with 7.2 kHz roll-off) 160 350 Receive noise (see Note 10) Inputs grounded Gain = 1 300 500 µVrms Receive noise (see Note 10) In uts grounded, Gain = 1 18 dBrnc0 † All typical values are at TA = 25°C. NOTE 10: The noise is computed by statistically evaluating the digital output of the A/D converter. 3.5 Timing Requirements 3.5.1 Serial Port Recommended Input Signals, TLC32046C and TLC32046I PARAMETER MIN MAX UNIT tc(MCLK) Master clock cycle time 95 ns tr(MCLK) Master clock rise time 10 ns tf(MCLK) Master clock fall time 10 ns Master clock duty cycle 25% 75% RESET pulse duration (see Note 11) 800 ns tsu(DX) DX setup time before SCLK ↓ 20 ns th(DX) DX hold time after SCLK ↓ tc(SCLK)/4 ns NOTE 11: RESET pulse duration is the amount of time that the RESET is held below 0.8 V after the power supplies have reached their recommended values. 3.5.2 Serial Port Recommended Input Signals, TLC32046M PARAMETER MIN TYP† MAX UNIT tc(MCLK) Master clock cycle time 95 ns tr(MCLK) Master clock rise time 10 ns tf(MCLK) Master clock fall time 10 ns Master clock duty cycle 50% RESET pulse duration (see Note 11) 800 ns tsu(DX) DX setup time before SCLK ↓ 28 ns th(DX) DX hold time after SCLK ↓ tc(SCLK)/4 ns NOTE 11: RESET pulse duration is the amount of time that the RESET is held below 0.8 V after the power supplies have reached their recommended values. |
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