TLC32046MFKB datasheet(19/56 Pages) TI

19 / 56 page

2–5

2.8

Serial Port

The serial port has four possible configurations summarized in the function table on page 1–2. These

configurations are briefly described below.

•

The transmit and receive sections are operated asynchronously, and the serial port interfaces

directly with the TMS320C17. The communications protocol is two 8-bit bytes.

•

The transmit and receive sections are operated asynchronously, and the serial port interfaces

directly with the TMS32020, TMS320C25, and TMS320C30. The communications protocol is

one 16-bit word.

•

The transmit and receive sections are operated synchronously, and the serial port interfaces

directly with the TMS320C17. The communications protocol is two 8-bit bytes.

•

The transmit and receive sections are operated synchronously, and the serial port interfaces

directly with the TMS32020, TMS320C25, TMS320C30, or two SN74299 serial-to-parallel shift

registers, which can interface in parallel to the TMS32010, TMS320C15, to any other digital

signal processor, or to external FIFO circuitry. The communications protocol is one 16-bit word.

2.9

Synchronous Operation

When the transmit and receive sections are operated synchronously, the low-pass filter clock drives both

low-pass and band-pass filters (see Functional Block Diagram). The A/D conversion timing is derived from

and equal to the D/A conversion timing. When data bit D5 in the control register is a logic 1, transmit and

receive sections are synchronous. The band-pass switched-capacitor filter and the A/D converter timing are

derived from the TX(A) counter, the TX(B) counter, and the TA and TA’ registers. In synchronous operation,

both the A/D and the D/A channels operate from the same frequencies. The FSX and the FSR timing is

identical during primary communication, but FSR is not asserted during secondary communication because

there is no new A/D conversion result.

2.9.1

One 16-Bit Word (Dual-Word [ Telephone Interface] or Word Mode)

The serial port interfaces directly with the serial ports of the TMS32020, TMS320C25, and the TMS320C30,

and communicates in one 16-bit word. The operation sequence is as follows:

The FSX and FSR pins are brought low by the TLC32046 AIC.

One 16-bit word is transmitted and one 16-bit word is received.

FSX and FSR are brought high.

EODX and EODR emit low-going pulses one shift clock wide. EODX and EODR are valid in the

word or byte mode only.

If the device is in the dual-word (telephone interface) mode, FSD goes low during the secondary

communication period and enables the data word received at the DATA-DR/CONTROL input to be routed

to the DR line. The secondary communication period occurs four shift clocks after completion of primary

communications.

2.9.2

Two 8-Bit Bytes (Byte Mode)

The serial port interfaces directly with the serial port of the TMS320C17 and communicates in two 8-bit

bytes. The operation sequence is as follows:

FSX and FSR are brought low.

One 8-bit word is transmitted and one 8-bit word is received.

EODX and EODR are brought low.

FSX and FSR emit positive frame-sync pulses that are four shift clock cycles wide.

One 8-bit byte is transmitted and one 8-bit byte is received.

FSX and FSR are brought high.

EODX and EODR are brought high.

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