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TLC32046MFKB Datasheet(PDF) 17 Page - Texas Instruments |
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TLC32046MFKB Datasheet(HTML) 17 Page - Texas Instruments |
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17 / 56 page ![]() 2–3 See Table 2-3 See Table 2-3 See Table 2-3 See Table 2-3 7.20 kHz for RB = 40 8.00 kHz for RB = 36 9.60 kHz for RB = 30 14.4 kHz for RB = 20 16.0 kHz for RB = 18 19.2 kHz for RB = 15 7.20 kHz for TB = 40 8.00 kHz for TB = 36 9.60 kHz for TB = 30 14.4 kHz for TB = 20 16.0 kHz for TB = 18 19.2 kHz for TB = 15 Divide By 2 XTAL OSC 20.736 MHZ 41.472 MHZ TA Register (5 Bits) Divide By 2 576 kHz TB Register (6 Bits) RA Register (5 Bits) 576 kHz Divide By 4 1.296 MHz 2.592 MHz 5.184 MHz 10.368 MHz MASTER CLOCK TMS320 DSP SHIFT CLOCK TA ′ REGISTER (6 Bits) 2s-Complement TA Adder/Subtractor D1 D0 SELECT 0 0 1 1 0 1 0 1 TA TA + TA ′ TA – TA ′ TA See Table 2-2 TX (A) Counter (6 Bits) TX (B) Counter 288 kHz SCF CLOCK Low-Pass Filter, (sin x)/x Filter D/A Conversion Frequency See Table 2-3 RA ′ Register (6 Bits) 2s-Complement RA See Table 2-3 Adder/Subtractor RX (A) Counter (6 Bits) D1 D0 SELECT 0 0 1 1 0 1 0 1 RA RA + RA ′ RA – RA ′ RA See Table 2-2 RB Register (6 Bits) RX (B) Counter High-Pass Filter, A/D Conversion Frequency 288 kHz Low-Pass Filter SCF CLOCK 9 18 9 18 Transmit Section D/A Conversion Timing Receive Section A/D Conversion Timing † † † These control bits are described in the DX Serial Data Word Format section. NOTES: A. Tables 2–2 and 2–3 are primary and secondary communication protocols, respectively. B. In synchronous operation, RA, RA’, RB, RX(A), and RX(B) are not used. TA, TA’, TB, TX(A), and TX(B) are used instead. C. Items in italics refer only to frequencies and register contents, which are variable. A crystal oscillator driving 20.736 MHz into the TMS320-series DSP provides a master clock frequency of 5.184 MHz. The TLC32046 produces a shift clock frequency of 1.296 MHz. If the TX(A) register contents equal 9, the SCF clock frequency is 288 kHz, and the D/A conversion frequency is 288 kHz ÷ T(B). Figure 2–1. Asynchronous Internal Timing Configuration |
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