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LM8261 Datasheet(PDF) 16 Page - Texas Instruments

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Part # LM8261
Description  LM8261 Single RRIO, High Output Current & Unlimited Cap Load Op Amp in SOT-23-5
PDF  29 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM8261 Datasheet(HTML) 16 Page - Texas Instruments

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LM8261
SNOS469I – APRIL 2000 – REVISED MARCH 2013
www.ti.com
Figure 52. Input Stage Current vs. Differential Input Voltage
B) Output Stage
The output stage Figure 51 is comprised of complementary NPN and PNP common-emitter stages to permit
voltage swing to within a VCE(SAT) of either supply rail. Q9 supplies the sourcing and Q10 supplies the sinking
current load. Output current limiting is achieved by limiting the VCE of Q9 and Q10; using this approach to current
limiting, alleviates the draw back to the conventional scheme which requires one VBE reduction in output swing.
The frequency compensation circuit includes Miller capacitors from collector to base of each output transistor
(see Figure 51, Ccomp9 and Ccomp10). At light capacitive loads, the high frequency gain of the output transistors is
high, and the Miller effect increases the effective value of the capacitors thereby stabilizing the Op Amp. Large
capacitive loads greatly decrease the high frequency gain of the output transistors thus lowering the effective
internal Miller capacitance - the internal pole frequency increases at the same time a low frequency pole is
created at the Op Amp output due to the large load capacitor. In this fashion, the internal dominant pole
compensation, which works by reducing the loop gain to less than 0dB when the phase shift around the feedback
loop is more than 180°C, varies with the amount of capacitive load and becomes less dominant when the load
capacitor has increased enough. Hence the Op Amp is very stable even at high values of load capacitance
resulting in the uncharacteristic feature of stability under all capacitive loads.
DRIVING CAPACITIVE LOADS
The LM8261 is specifically designed to drive unlimited capacitive loads without oscillations (See Settling Time
and Percent Overshoot vs. Cap Load plot, Figure 32). In addition, the output current handling capability of the
device allows for good slewing characteristics even with large capacitive loads (see Slew Rate vs. Cap Load
plots). The combination of these features is ideal for applications such as TFT flat panel buffers, A/D converter
input amplifiers, etc.
However, as in most Op Amps, addition of a series isolation resistor between the Op Amp and the capacitive
load improves the settling and overshoot performance.
Output current drive is an important parameter when driving capacitive loads. This parameter will determine how
fast the output voltage can change. Referring to the Slew Rate vs. Cap Load Plots (Figure 33, Figure 34,
Figure 35, and Figure 36), two distinct regions can be identified. Below about 10,000pF, the output Slew Rate is
solely determined by the Op Amp's compensation capacitor value and available current into that capacitor.
Beyond 10nF, the Slew Rate is determined by the Op Amp's available output current. Note that because of the
lower output sourcing current compared to the sinking one, the Slew Rate limit under heavy capacitive loading is
determined by the positive transitions. An estimate of positive and negative slew rates for loads larger than
100nF can be made by dividing the short circuit current value by the capacitor.
16
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Product Folder Links: LM8261



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